Analysis and Design of a Transmitter for Wireless Communications in CMOS Technology

The number of wireless devices has grown tremendously over the last decade. Great technology improvements and novel transceiver architectures and circuits have enabled an astonishingly expanding set of radio-frequency applications. CMOS technology played a key role in enabling a large-scale diffusion of wireless devices due to its unique advantages in cost and integration. Novel digital-intensive transceivers have taken full advantage of CMOS technology scaling predicted by Moore's law. Die-shrinking has enabled ubiquitous diffusion of low-cost, small form factor and low power wireless devices. However, Radio Frequency (RF) Power Amplifiers (PA) transceiver functionality is historically implemented in a module which is separated from the CMOS core of the transceiver. The PA is traditionally dictating power and battery life of the transceiver, thus justifying its implementation in a tailored technology. By contrast, a fully integrated CMOS transceiver with no external PA would hugely benefit in terms of reduced area and system complexity. In this work, a fully integrated prototype of a Switched-Capacitor Power Amplifier (SCPA) has been implemented in a 28nm CMOS technology. The SCPA provides the functionalities of a PA and of a Radio-Frequency Digital-to-Analog Converter (RF-DAC) in a monolithic CMOS device. The switching output stage of the SCPA enables this circuital topology to reach high efficiencies and offers excellent power handling capabilities. In this work, the properties of the SCPA are analyzed in an extensive and detailed dissertation. Nowadays Wireless Communications operate in a very crowded spectrum, with strict coexistence requirements, thus demanding a strong linearity to the RF-DAC section of the SCPA. A great part of the work of designing a good SCPA is in fact designing a good RF-DAC. To enhance RF-DAC linearity, a precision of the timing of the elements up to the ps range is required. The use of a single core-supply voltage in the whole circuit including the CMOS inverter of the switching output stage enables the use of minimum size devices, improving accuracy and speed in the timing of the elements. The whole circuit operates therefore on low core-supply voltage. Throughout this work, a detailed analysis carefully describes the electromagnetic structures which maximize power and efficiency of low-voltage SCPAs. Due to layout issues subsequent to limited available voltages, however, there is a practical limitation in the maximum achievable power of low-voltage SCPAs. In this work, a Multi-Port Monolithic Power Combiner (PC) is introduced to overcome this limitation and further enhance total achieved system power. The PC sums the power of a collection of SCPAs to a single output, allowing higher output powers at a high efficiency. Benefits, drawbacks and design of SCPA PCs are discussed in this work. The implemented circuit features the combination of four differential SCPAs through a four-way monolithic PC and is simulated to obtain a maximum drain efficiency of 44% at a peak output power of 29dBm on 1.1V supply voltage. Extensive spectrum analysis offers full evaluation of system performances. After exploring state-of-the-art possibilities offered by an advanced 28nm CMOS technology, this work predicts through rigorous theoretical analysis the expected evolution of SCPA performances with the scaling of CMOS Technologies. The encouraging forecast further emphasizes the importance of SCPA circuits for the future of high-performance Wireless Communications

Integrated Circuit and Antenna Technology for Millimeter-wave Phased Array Radio Front-end

Ever growing demands for higher data rate and bandwidth are pushing extremely high data rate wireless applications to millimeter-wave band (30-300GHz), where sufficient bandwidth is available and high data rate wireless can be achieved without using complex modulation schemes. In addition to the communication applications, millimeter-wave band has enabled novel short range and long range radar sensors for automotive as well as high resolution imaging systems for medical and security. Small size, high gain antennas, unlicensed and worldwide availability of released bands for communication and a number of other applications are other advantages of the millimeter-wave band. The major obstacle for the wide deployment of commercial wireless and radar systems in this frequency range is the high cost and bulky nature of existing GaAs- and InP-based solutions. In recent years, with the rapid scaling and development of the silicon-based integrated circuit technologies such as CMOS and SiGe, low cost technologies have shown acceptable millimeter-wave performance, which can enable highly integrated millimeter-wave radio devices and reduce the cost significantly. Furthermore, at this range of frequencies, on-chip antenna becomes feasible and can be considered as an attractive solution that can further reduce the cost and complexity of the radio package. The propagation channel challenges for the realization of low cost and reliable silicon-based communication devices at millimeter-wave band are severe path loss as well as shadowing loss of human body. Silicon technology challenges are low-Q passive components, low breakdown voltage of active devices, and low efficiency of on-chip antennas. The main objective of this thesis is to investigate and to develop antenna and front-end for cost-effective silicon based millimeter-wave phased array radio architectures that can address above challenges for short range, high data rate wireless communication as well as radar applications. Although the proposed concepts and the results obtained in this research are general, as an important example, the application focus in this research is placed on the radio aspects of emerging 60 GHz communication system. For this particular but extremely important case, various aspects of the technology including standard, architecture, antenna options and indoor propagation channel at presence of a human body are studied. On-chip dielectric resonator antenna as a radiation efficiency improvement technique for an on-chip antenna on low resistivity silicon is presented, developed and proved by measurement. Radiation efficiency of about 50% was measured which is a significant improvement in the radiation efficiency of on-chip antennas. Also as a further step, integration of the proposed high efficiency antenna with an amplifier in transmit and receive configurations at 30 GHz is successfully demonstrated. For the implementation of a low cost millimeter-wave array antenna, miniaturized, and efficient antenna structures in a new integrated passive device technology using high resistivity silicon are designed and developed. Front-end circuit blocks such as variable gain LNA, continuous passive and active phase shifters are investigated, designed and developed for a 60GHz phased array radio in CMOS technology. Finally, two-element CMOS phased array front-ends based on passive and active phase shifting architectures are proposed, developed and compared

RF-MEMS switches for reconfigurable antennas

This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.Reconfigurable antennas are attractive for many military and commercial applications where it is required to have a single antenna that can be dynamically reconfigured to transmit or receive on multiple frequency bands and patterns. RF-MEMS is a promising technology that has the potential to revolutionize RF and microwave system implementation for next generation telecommunication applications. Despite the efforts of top industrial and academic labs, commercialization of RFMEMS switches has lagged expectations. These problems are connected with switch design (high actuation voltage, low restoring force, low power handling), packaging (contamination layers) and actuation control (high impact force, wear, fatique). This Thesis focuses on the design and control of a novel ohmic RF-MEMS switch specified for reconfigurable antennas applications. This new switch design focuses on the failure mechanisms restriction, the simplicity in fabrication, the power handling and consumption, as well as controllability. Finally, significant attention has been paid in the switch’s electromagnetic characteristics. Efficient switch control implies increased reliability. Towards this target three novel control modes are presented. 1) Optimization of a tailored pulse under Taguchi’s statistical method, which produces promising results but is also sensitive to fabrication tolerances. 2) Quantification of resistive damping control mode, which produces better results only during the pull-down phase of the switch while it is possible to be implemented successfully in very stiff devices. 3) The “Hybrid” control mode, which includes both aforementioned techniques, offering outstanding switching control, as well as immunity to fabrication tolerances, allowing an ensemble of switches rendering an antenna reconfigurable, to be used. Another issue that has been addressed throughout this work is the design and optimization of a reconfigurable, in pattern and frequency, three element Yagi-Uda antenna. The optimization of the antenna’s dimensions has been accomplished through the implementation of a novel technique based on Taguchi’s method, capable of systematically searching wider areas, named as “Grid-Taguchi” method

Ultra Wideband

Ultra wideband (UWB) has advanced and merged as a technology, and many more people are aware of the potential for this exciting technology. The current UWB field is changing rapidly with new techniques and ideas where several issues are involved in developing the systems. Among UWB system design, the UWB RF transceiver and UWB antenna are the key components. Recently, a considerable amount of researches has been devoted to the development of the UWB RF transceiver and antenna for its enabling high data transmission rates and low power consumption. Our book attempts to present current and emerging trends in-research and development of UWB systems as well as future expectations

RF-MEMS switches for reconfigurable antennas

Reconfigurable antennas are attractive for many military and commercial applications where it is required to have a single antenna that can be dynamically reconfigured to transmit or receive on multiple frequency bands and patterns. RF-MEMS is a promising technology that has the potential to revolutionize RF and microwave system implementation for next generation telecommunication applications. Despite the efforts of top industrial and academic labs, commercialization of RFMEMS switches has lagged expectations. These problems are connected with switch design (high actuation voltage, low restoring force, low power handling), packaging (contamination layers) and actuation control (high impact force, wear, fatique). This Thesis focuses on the design and control of a novel ohmic RF-MEMS switch specified for reconfigurable antennas applications. This new switch design focuses on the failure mechanisms restriction, the simplicity in fabrication, the power handling and consumption, as well as controllability. Finally, significant attention has been paid in the switch’s electromagnetic characteristics. Efficient switch control implies increased reliability. Towards this target three novel control modes are presented. 1) Optimization of a tailored pulse under Taguchi’s statistical method, which produces promising results but is also sensitive to fabrication tolerances. 2) Quantification of resistive damping control mode, which produces better results only during the pull-down phase of the switch while it is possible to be implemented successfully in very stiff devices. 3) The “Hybrid” control mode, which includes both aforementioned techniques, offering outstanding switching control, as well as immunity to fabrication tolerances, allowing an ensemble of switches rendering an antenna reconfigurable, to be used. Another issue that has been addressed throughout this work is the design and optimization of a reconfigurable, in pattern and frequency, three element Yagi-Uda antenna. The optimization of the antenna’s dimensions has been accomplished through the implementation of a novel technique based on Taguchi’s method, capable of systematically searching wider areas, named as “Grid-Taguchi” method.EThOS - Electronic Theses Online ServiceGBUnited Kingdo

Designing Flexible, Energy Efficient and Secure Wireless Solutions for the Internet of Things

The Internet of Things (IoT) is an emerging concept where ubiquitous physical objects (things) consisting of sensor, transceiver, processing hardware and software are interconnected via the Internet. The information collected by individual IoT nodes is shared among other often heterogeneous devices and over the Internet. This dissertation presents flexible, energy efficient and secure wireless solutions in the IoT application domain. System design and architecture designs are discussed envisioning a near-future world where wireless communication among heterogeneous IoT devices are seamlessly enabled. Firstly, an energy-autonomous wireless communication system for ultra-small, ultra-low power IoT platforms is presented. To achieve orders of magnitude energy efficiency improvement, a comprehensive system-level framework that jointly optimizes various system parameters is developed. A new synchronization protocol and modulation schemes are specified for energy-scarce ultra-small IoT nodes. The dynamic link adaptation is proposed to guarantee the ultra-small node to always operate in the most energy efficiency mode, given an operating scenario. The outcome is a truly energy-optimized wireless communication system to enable various new applications such as implanted smart-dust devices. Secondly, a configurable Software Defined Radio (SDR) baseband processor is designed and shown to be an efficient platform on which to execute several IoT wireless standards. It is a custom SIMD execution model coupled with a scalar unit and several architectural optimizations: streaming registers, variable bitwidth, dedicated ALUs, and an optimized reduction network. Voltage scaling and clock gating are employed to further reduce the power, with a more than a 100% time margin reserved for reliable operation in the near-threshold region. Two upper bound systems are evaluated. A comprehensive power/area estimation indicates that the overhead of realizing SDR flexibility is insignificant. The benefit of baseband SDR is quantified and evaluated. To further augment the benefits of a flexible baseband solution and to address the security issue of IoT connectivity, a light-weight Galois Field (GF) processor is proposed. This processor enables both energy-efficient block coding and symmetric/asymmetric cryptography kernel processing for a wide range of GF sizes (2^m, m = 2, 3, ..., 233) and arbitrary irreducible polynomials. Program directed connections among primitive GF arithmetic units enable dynamically configured parallelism to efficiently perform either four-way SIMD GF operations, including multiplicative inverse, or a long bit-width GF product in a single cycle. This demonstrates the feasibility of a unified architecture to enable error correction coding flexibility and secure wireless communication in the low power IoT domain.PHDComputer Science & EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/137164/1/yajchen_1.pd