Power measurements based on the Conservative Power Theory with a reduced sampling rate for lowering implementation cost

Abstract

This paper proposes a digital implementation of the Conservative Power Theory (CPT) using reduced sampling rates below 300 Hz, while maintaining acceptable accuracy and precision. Computer simulations at an 8 kHz sampling rate showed power calculation errors below 5% compared to an ideal continuous-time reference. Sampling rates under 300 Hz were found to yield similar performance. The study included active, reactive, and non-conventional power quantities under unbalanced load and distorted waveform conditions, tested on unbalanced RL and nonlinear three-phase circuits. Hypothesis testing confirmed that 84.6% of cases had mean percentage errors below 10%, and 61.5% below 2%. This approach significantly reduces computational costs, enabling low-cost, low-power microcontroller implementations without compromising accuracy or precision