Asanin, Bogdan

Karadaglic, Dejan

Knezevic, Sasa

Stojanovic, Radovan

English

This paper proposes an on-line system for feature extraction from ECG signal. The QRS detector, RR interval calculator, heart rate calculator and additional modules are developed in VHDL code and embedded in a single FPGA chip. The overall design has a low hardware occupation, 1838 LEs, and minimal number of setting parameters, only two, sampling and clock rates. The achieved accuracy is 97.5%. As such, it is very suitable for embedding in wearable health care systems, portable instruments and telemedicine devices. The methodology for QRS detection, system architecture and preliminary testing results are presented

ResearchOnline@GCU

A single chip system for ECG feature extraction

https://researchonline.gcu.ac.uk/files/3656196/MECO2013.pdf

A single chip system for ECG feature extraction

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