Silicon members are hermetically sealed to each other. Process produces no measurable deformation of silicon surfaces and is compatible with package designs of tight tolerance. Seals have been made with glass coatings in 10-mm to 20-mm thickness range without any prior annealing of coated silicon substrates

Brooks, A. D.

Donovan, R. P.

Hardesty, C. A.

English

NASA Technical Reports Server

Jahuary 1975	 B74-10263 
NASA TECH BRIEF 
Langley Research Center 
NASA Tech Briefs announce new technology derived from the U.S. space program. They are issued to encourage 
commercial application. Tech Briefs are available on a subscription basis from the National Technical Information 
Service, Springfield, Virginia 22151. Requests for individual copies or questions relating to the Tech Brief program may 
be directed to the Technology Utilization Office, NASA, Code KT, Washington, D.C. 20546. 
Low-Temperature Electrostatic Silicon-to-Silicon Seals

Using Sputtered Borosilicate Glass 
A new method for sealing two silicon surfaces 
together produces an all-silicon package. The 
package has advantages which are especially impor-
tant for compensating the effects of temperature upon 
piezoresistive and piezojunction sensors. The silicon 
members are hermetically sealed to each other at a 
temperature Z 5000 C. The process produces no 
measurable deformation of the silicon surfaces and is 
compatible with package designs of tight tolerance. 
The surfaces of the silicon members to be sealed are 
polished, cleaned, and stripped of any residual oxide. 
They are then coated with sputtered borosilicate glass 
to a minimum glass thickness of approximately 4 .tm. 
Prior to sealing, each coated silicon substrate is 
annealed at 600° to 9000 C. A slightly higher yield is 
obtained when this annealing is carried out in steam, 
but successful seals are formed after annealing in 
either nitrogen or oxygen. 
Piezoresistive
Elements 
Borositicate 
Glass
	 Silicon 
I	 I J	
conEtched Vacuum Cavity 
Silicon-to-Silicon Electrostatic Seal Under Hermetic Teat
To achieve the silicon-to-silicon electrostatic seal, a 
second polished silicon chip is alined in the desired 
orientation on top of the first silicon member, which is 
already coated with borosilicate glass. The combina-
tion is then heated and stabilized to a temperature of 
450° to 550° C. A slowly-increasing dc voltage is then 
applied across the silicon-borosilicate glass-silicon 
sandwich, the uncoated silicon member being 
positively biased. After reaching a maximum voltage 
(50 V), the sandwich is left at the process temperature 
and the maximum voltage for 5 minutes. To complete 
the sealing operation, the substrate heater is removed, 
and the sandwich is returned to near room 
temperature before removing the voltage. 
To test the hermeticity of such a seal, a number of 
silicon-to-silicon seals were prepared in which one 
silicon member of the silicon-borosilicate glass-silicon 
sandwich had a deep cavity etched part way through 
it. The second silicon member was then thinned to a 
total thickness of 0.025 to 0.1 mm (1 to 4 mils), and 
the sealing operation was carried out in a vacuum 
chamber at a pressure of approximately 10' torr. 
Upon completing the seal and removing the unit from 
the chamber, atmospheric loading on the thin top 
member produced a visible depression above the 
cavity, as shown in the illustration. 
Such an evacuated cavity has been measured as 
essentially leak free by helium leak testing. Even after 
63 thermal cycles between +100° and —40° C, the 
unit showed no loss of dimple or measurable leak rate. 
(continued overleaf) 
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https://ntrs.nasa.gov/search.jsp?R=19740000263 2020-03-17T13:58:20+00:00Z
Notes: 
1. Seals have been made with glass coatings in the 
10-mm to 20-mm thickness range without any 
prior annealing of the coated silicon substrates. 
Higher maximum 'sealing voltages can be tolera-
ted with the thicker glass coatings without the 
danger of breakdowns. 
2. Requests for further information may be directed 
to:
Technology Utilization Officer 
Langley Research Cçntçr 
Mail Stop 139-A 
Hampton, Virginia 23665 
Reference: B74-10263
Patent status: 
NASA has decided not to apply for a patent. 
Source: C. A. Hardesty
Langley Research Cëntër and
A. D. Brooks and R. P. Donovan of 
Research Triangle Institute 
under contract to
Langley Research Center 
(LAR-1 1589) 
4 
Categories: 08 (Fabrication Technology) 
04 (Materials) 
01 (Electronics - Components and 
B74-16263


Low-temperture electrostatic silicon-to-silicon seals using sputtered borosilicate glass

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