A model of a generalized chip structure

Three distinct levels can be distinguished in the design of digital systems: architecture, implementation and realization. Description methods are available at each level assuming that at the realization level components such as nands and nors are used. The introduction of programmable components, such as microprocessors and programmable input/output chips, which now form the basis elements at the realization level, forces to reconsider these description methods

Microprogramming and microprocessors in the Netherlands

This paper gives a short survey of the activities in the field of microprocessors and microprogramming in the Netherlands. In the first part of it the activies within the Universities and non commercial institutes are mentioned. The second part deals with the industrial activity. The author is aware of the incompleteness of the survey. The reason for it is twofold. First; Some of the activies, especially in the industrie, have confidential aspects. The information may not yet appear in a paper like this. Second; He is not aware of all activities carried out in the field. A list of names of the institutes etcand eventual contactpersons is included. A literature list is not added, because not much literature is available now

Graphical microcode simulator with a reconfigurable datapath

Microcode is a symbolic way to simplify control design that allows changing, testing and updating the control unit of processors. By changing the microcode, the same datapath can be used for an entirely different application, such as supporting a completely different instruction set. For these reasons, a majority of control units in modern day processors are microcoded. The object was to investigate and implement a graphical microcode simulator with a reconfigurable datapath and microcode format. By allowing a wide configuration of the datapath, many types of logical processors can be designed and simulated. The resulting implemented simulator is able to fill the void in microprogramming tools since there are no graphical microcode simulators that allow such customization of the datapath. The customization of the datapath goes beyond allowing different files specifying the datapath, it allows the datapath to be created and modified using the graphical interface.This tool is able to be used to design and simulate general-purpose processors and application specific processors through datapath and microcode configurations. In the academic setting, this tool provides easier microcode testing through verification on the instruction level for instructors and provide simulation debugging through code tracing and breakpoints for students

VLSI top-down design based on the separation of hierarchies

Despite the presence of structure, interactions between the three views on VLSI design still lead to lengthy iterations. By separating the hierarchies for the respective views, the interactions are reduced. This separated hierarchy allows top-down design with functional abstractions as exemplified by an experimental self-timed CMOS RISC computer design

Knowledge transformers : a link between learning and creativity

The purpose of this paper is to investigate whether knowledge transformers which are featured in the learning process, are also present in the creative process. This is achieved by reviewing models and theories of creativity and identifying the existence of the knowledge transformers. The investigation shows that there is some evidence to show that the creative process can be explained through knowledge transformers. Hence, it is suggested that one of links between learning and creativity is through the knowledge transformers

Microprogramming For Probability Distribution Sampling

Microprogramming of special instructions for sampling of random variates from any probability distribution is a means of increasing sampling speed. The diversity of sampling techniques is narrowed to one general algorithm: conditional bit sampling. Conditional bit sampling uses a high-speed uniform random number generator based on feedback shift registers to sample one bit at a time. The probability of a bit being a one in the j-th position of a binary expanded variate is stored in a table of conditional probabilities. A comparison with the pseudorandom number yields a one or zero. The table of conditional probabilities is generated once and passed through an instruction to the microprogram which performs the sampling. One user instruction is issued for each variate returned