1,596 research outputs found

    Reducing switching losses through MOSFET-IGBT combination

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    This paper introduces a configuration aimed at switching losses reduction trough a power leg constructed by combining a MOSFET and an IGBT. The combined use of these different switches leads to the turn-on losses reduction trough the use of the faster freewheeling diode of the IGBT, and the turn-off losses reduction trough use of the MOSFET’s lower losses because of the lack of tailing current, typical for IGBT’s. The introduced leg structure can be used to build single phase – full bridge invertors or three phase inverters. The proposed leg is realized, experimented and validated

    Ultrafast WDM logic

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    Ultrafast all-optical logic gates that accept optical inputs in which wavelength designates bit position within the overall byte are proposed and demonstrated. Four-wave mixing is shown to provide a conditional test function that can be used to construct any multi-input logic gate. Polarization provides the logic state for each bit. Implementations that use semiconductor optical amplifiers as the four-wave mixing medium can be monolithic and compact

    Influence of grid configuration on current conducting behaviour in PV installations

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    On the roof of an industrial site a 385 kWp PhotoVoltaic installation is operational. When production of this system reaches 60% of the installed power, the circuit breaker trips. At sufficient production, measurements show a high distortion of phase voltage and variable waveform of both phase voltage and current. Analysis of the installation showed that a Yy0 transformer is used introducing a high zero sequence impedance. Unbalance in the injected current combined with a high zero sequence impedance leads to a high neutral-ground voltage and distorted phase-neutral voltages. In this paper it will be shown that the tripping of the circuit breaker is caused by the measurement method of the device. This paper analyses the practical measurement results, causes of errors and the solution to the stated problem

    Serialized Asynchronous Links for NoC

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    This paper proposes an asynchronous serialized link for NoC that can achieve the same levels of performance in terms of flits per second as a synchronous link but with a reduced number of wires in the point to point switch links and reduced power consumption. This is achieved by employing serialization in the asynchronous domain as opposed to synchronous to facilitate the removal of global clocking on the serial links. Based on transistor level simulations using 0.12 ?m foundry models it has been shown that it is possible to achieve the same level of performance as synchronous but with 75% reduction in wires and 65% reduction in power for a 300 MFlit/s link with 8 buffers with a switch clock speed of 300 MHz. Furthermore the paper presents the design requirements arising from interfacing switches of synchronous NoC and asynchronous serial links

    Nanowire Zinc Oxide MOSFET Pressure Sensor

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    Fabrication and characterization of a new kind of pressure sensor using self-assembly Zinc Oxide (ZnO) nanowires on top of the gate of a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is presented. Self-assembly ZnO nanowires were fabricated with a diameter of 80 nm and 800 nm height (80:8 aspect ratio) on top of the gate of the MOSFET. The sensor showed a 110% response in the drain current due to pressure, even with the expected piezoresistive response of the silicon device removed from the measurement. The pressure sensor was fabricated through low temperature bottom up ultrahigh aspect ratio ZnO nanowire growth using anodic alumina oxide (AAO) templates. The pressure sensor has two main components: MOSFET and ZnO nanowires. Silicon Dioxide growth, photolithography, dopant diffusion, and aluminum metallization were used to fabricate a basic MOSFET. In the other hand, a combination of aluminum anodization, alumina barrier layer removal, ZnO atomic layer deposition (ALD), and wet etching for nanowire release were optimized to fabricate the sensor on a silicon wafer. The ZnO nanowire fabrication sequence presented is at low temperature making it compatible with CMOS technology

    Analog and Mixed Signal Verification

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    More and more electronic systems have components that are not purely digital. Verification of such systems is a much less developed discipline than the digital equivalents and the application of formal (mathematically complete) techniques is a nascent area. In this paper, we will discuss the nature of analog circuit design and describe the way verification is done in practice today. We will describe some “formal” approaches coming from the analog design community. We will describe some of the approaches to formal verification that have been presented in recent literature. Finally, we will mention some areas where there are opportunities for future work

    Control electronics for a neuro-electronic interface implemented in a gate array

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    Presents a Gate Array for implementing electronic circuitry to control multi-electrode arrays, which consist of 128 microelectrodes. The chip contains multiplexers, current sources and buffer amplifiers in CMOS technolog

    Development of scientific fundamentals of building of multi-level voltage inverters for alternative power sources in the system Smart Grid

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    Створено нову концепцію побудови промислових багаторівневих автономних інверторів (БРІ) на базі спектральних ортогональних перетворень дискретних функцій з m- ічним аргументом та законів m-ічної системи числення; розроблено способи та пристрої компенсації реактивної потужності навантаження автономних багаторівневих інверторів; запропоновано методику побудови систем електроживлення на основі БРІ та фільтрокомпенсуючого пристрою (ФКП) паралельного типу; розроблено структури силової частини та системи керування трифазних автономних інверторів та систем забезпечення заданого рівня коефіцієнта несиметрії; запропоновано економічно вигідне рішення використання комірок багаторівневого інвертора в якості компенсаційного перетворювача ФКП, що дає можливість комбінувати функції формування напруги живлення і компенсації реактивної потужності в одному БРІ; запропоновано спосіб керування фільтро- компенсуючим пристроєм з підтриманням постійного заряду акумуляторної батареї; розроблено систему комплексного моніторингу та оцінки параметрів джерел енергії, акумуляторних батарей, перетворювальних пристроїв та навантажень у мережі Smart Grid; розроблено способи керування перетворювачами електричної енергії, генераторами та навантаженнями локального технічного або технологічного об'єкту за вартісним критерієм.New conception of building of industrial multi-level autonomous invertors on the base of spectral orthogonal transforms of discrete functions with m-ary argument and m-ary counting system. Means and devices to compensate reactive load power for autonomous multi-level invertors are developed. Method for building of energy-supply systems on the base of multi-level invertors and parallel filter-compensating devices is proposed. Structure of power part and control system of three-phase autonomous invertors and system for providing of assigned value of non-symmetry factor are developed. Using of cells of multi-level inverter as compensating converter in filtercompensating device is proposed as economically attractive solution. It allows to combine the functions of source voltage forming and reactive power compensation within single multi-level inverter. The way of control of filter-compensating device supporting constant accumulator charge is proposed. System of complex monitoring and estimation of the parameters of electrical energy and the loads in Smart Grid is elaborated. The ways of control of electrical energy converters, generators and consumers at local technical or technological object by cost criteria are created.Создана новая концепция построения промышленных многоуровневых автономных инверторов (МАИ) на базе спектральных ортогональных преобразований дискретных функций с m-ичним аргументом и законов m-ичной системы счисления; разработаны способы и устройства компенсации реактивной мощности нагрузки автономных многоуровневых инверторов; предложена методика построения систем электропитания на основе МАИ и фильтрокомпенсирующие устройства (ФКП) параллельного типа; разработаны структуры силовой части и системы управления трехфазных автономных инверторов и систем обеспечения заданного уровня коэффициента несимметрии; предложено экономически выгодное решение использования ячеек многоуровневого инвертора в качестве компенсационного преобразователя ФКП, что дает возможность комбинировать функции формирования напряжения питания и компенсации реактивной мощности в одном МАИ; предложен способ управления фильтро-компенсирующим устройством с поддержкой постоянного заряда аккумуляторной батареи; разработана система комплексного мониторинга и оценки параметров источников энергии, аккумуляторных батарей, преобразователей электроэнергии и нагрузок в сети Smart Grid; разработаны способы управления преобразователями электрической энергии, генераторами и нагрузками локального технического или технологического объекта по стоимостному критерию

    Phase-ambiguity resolution for QPSK modulation systems. Part 2: A method to resolve offset QPSK

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    Part 2 presents a new method to resolve the phase-ambiguity for Offset QPSK modulation systems. When an Offset Quaternary Phase-Shift-Keyed (OQPSK) communications link is utilized, the phase ambiguity of the reference carrier must be resolved. At the transmitter, two different unique words are separately modulated onto the quadrature carriers. At the receiver, the recovered carrier may have one of four possible phases, 0, 90, 180, or 270 degrees, referenced to the nominally correct phase. The IF portion of the channel may cause a phase-sense reversal, i.e., a reversal in the direction of phase rotation for a specified bit pattern. Hence, eight possible phase relationships (the so-called eight ambiguous phase conditions) between input and output of the demodulator must be resolved. Using the In-phase (I)/Quadrature (Q) channel reversal correcting property of an OQPSK Costas loop with integrated symbol synchronization, four ambiguous phase conditions are eliminated. Thus, only four possible ambiguous phase conditions remain. The errors caused by the remaining ambiguous phase conditions can be corrected by monitoring and detecting the polarity of the two unique words. The correction of the unique word polarities results in the complete phase-ambiguity resolution for the OQPSK system
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