Carbon Dot Loading and TiO₂ Nanorod Length Dependence of Photoelectrochemical Properties in Carbon Dot/TiO₂ Nanorod Array Nanocomposites

Photoelectrochemcial (PEC) properties of TiO₂ nanorod arrays (TNRA) have been extensively investigated as they are photostable and cost-effective. However, due to the wide band gap, only the UV part of solar light can be employed by TiO₂. To enhance the photoresponse of TNRA in the visible range, carbon dots (C dots) were applied as green sensitizer in this work by investigating the effects of C dot loading and length of TiO₂ nanorod on the PEC properties of TNRA/C dot nanocomposites. As the C dot loading increases, the photocurrent density of the nanocomposites was enhanced and reached a maximum when the concentration of the C dots was 0.4 mg/mL. A further increase in the C dot concentration decreased the photocurrent, which might be caused by the surface aggregation of C dots. A compromise existed between charge transport and charge collection as the length of TiO₂ nanorod increased. The incident photon to current conversion efficiency (IPCE) of the TNRA/C dot nanocomposites in the visible range was up to 1.2–3.4%. This work can serve as guidance for fabrication of highly efficient photoanode for PEC cells based on C dots

Synthesis and Characterizations of Ternary InGaAs Nanowires by a Two-Step Growth Method for High-Performance Electronic Devices

InAs nanowires have been extensively studied for high-speed and high-frequency electronics due to the low effective electron mass and corresponding high carrier mobility. However, further applications still suffer from the significant leakage current in InAs nanowire devices arising from the small electronic band gap. Here, we demonstrate the successful synthesis of ternary InGaAs nanowires in order to tackle this leakage issue utilizing the larger band gap material but at the same time not sacrificing the high electron mobility. In this work, we adapt a two-step growth method on amorphous SiO₂/Si substrates which significantly reduces the kinked morphology and surface coating along the nanowires. The grown nanowires exhibit excellent crystallinity and uniform stoichiometric composition along the entire length of the nanowires. More importantly, the electrical properties of those nanowires are found to be remarkably impressive with <i>I</i>_ON/<i>I</i>_OFF ratio >10⁵, field-effect mobility of ∼2700 cm²/(V·s), and ON current density of ∼0.9 mA/μm. These nanowires are then employed in the contact printing and achieve large-scale assembly of nanowire parallel arrays which further illustrate the potential for utilizing these high-performance nanowires on substrates for the fabrication of future integrated circuits

Controllable p–n Switching Behaviors of GaAs Nanowires <i>via</i> an Interface Effect

Due to the extraordinary large surface-to-volume ratio, surface effects on semiconductor nanowires have been extensively investigated in recent years for various technological applications. Here, we present a facile interface trapping approach to alter electronic transport properties of GaAs nanowires as a function of diameter utilizing the acceptor-like defect states located between the intrinsic nanowire and its amorphous native oxide shell. Using a nanowire field-effect transistor (FET) device structure, p- to n-channel switching behaviors have been achieved with increasing NW diameters. Interestingly, this oxide interface is shown to induce a space-charge layer penetrating deep into the thin nanowire to deplete all electrons, leading to inversion and thus p-type conduction as compared to the thick and intrinsically n-type GaAs NWs. More generally, all of these might also be applicable to other nanowire material systems with similar interface trapping effects; therefore, careful device design considerations are required for achieving the optimal nanowire device performances

Manipulated Growth of GaAs Nanowires: Controllable Crystal Quality and Growth Orientations via a Supersaturation-Controlled Engineering Process

Controlling the crystal quality and growth orientation of high performance III–V compound semiconductor nanowires (NWs) in a large-scale synthesis is still challenging, which could restrict the implementation of nanowires for practical applications. Here we present a facile approach to control the crystal structure, defects, orientation, growth rate and density of GaAs NWs via a supersaturation-controlled engineering process by tailoring the chemical composition and dimension of starting Au_<i>x</i>Ga_<i>y</i> catalysts. For the high Ga supersaturation (catalyst diameter < 40 nm), NWs can be manipulated to grow unidirectionally along ⟨111⟩ with the pure zinc blende phase with a high growth rate, density and minimal amount of defect concentration utilizing the low-melting-point catalytic alloys (AuGa, Au₂Ga, and Au₇Ga₃ with Ga atomic concentration > 30%), whereas for the low Ga supersaturation (catalyst diameter > 40 nm), NWs are grown inevitably with a mixed crystal orientation and high concentration of defects from high-melting-point alloys (Au₇Ga₂ with Ga atomic concentration < 30%). In addition to the complicated control of processing parameters, the ability to tune the composition of catalytic alloys by tailoring the starting Au film thickness demonstrates a versatile approach to control the crystal quality and orientation for the uniform NW growth

Crystalline GaSb Nanowires Synthesized on Amorphous Substrates: From the Formation Mechanism to p‑Channel Transistor Applications

In recent years, because of the narrow direct bandgap and outstanding carrier mobility, GaSb nanowires (NWs) have been extensively explored for various electronics and optoelectronics. Importantly, these p-channel nanowires can be potentially integrated with n-type InSb, InAs, or InGaAs NW devices via different NW transfer techniques to facilitate the III–V CMOS technology. However, until now, there have been very few works focusing on the electronic transport properties of GaSb NWs. Here, we successfully demonstrate the synthesis of crystalline, stoichiometric, and dense GaSb NWs on amorphous substrates, instead of the commonly used III–V crystalline substrates, InAs, or GaAs NW stems as others reported. The obtained NWs are found to grow via the VLS mechanism with a narrow distribution of diameter (220 ± 50 nm) uniformly along the entire NW length (>10 μm) with minimal tapering and surface coating. Notably, when configured into FETs, the NWs exhibit respectable electrical characteristics with the peak hole mobility of ∼30 cm² V^–1 s^–1 and free hole concentration of ∼9.7 × 10¹⁷ cm^–3. All these have illustrated the promising potency of such NWs directly grown on amorphous substrates for various technological applications, as compared with the conventional MOCVD-grown GaSb NWs