BGA footprints modeling and physics based via models validation for power and signal integrity applications

Modeling and simulating the multi-scale nature of a power distribution network (PDN) is essential to ensure the correct functioning of the devices connected to it. Simple parallel-plate sections constitute the core of these PDN geometries, together with sections where a large number of holes and vias are present, as in the case of a BGA footprint. Employing a divide-and-conquer approach allows for the modeling of these geometries separately, i.e., 3-D full wave solvers for the sections with holes and vias, and a cavity model approach, for the simple parallel-plate structures. Also, equivalent circuit models can be obtained for time-domain and frequency-domain SPICE simulations --Abstract, page iv

An Extrapolation Procedure to Shorten Time Domain Simulations

Time-domain simulation algorithms are widely used in the anaylsis and design of electromagnetic systems. Many of them are characterized by high Q\u27s. Thus, the simulations have to employ many time steps in order to achieve a complete characterization of these systems. This time-consuming computational effort can be avoided if the late instants of time are extrapolated by applying a parametric estimation algorithm. An optimized implementation of a time-domain extrapolation method and a stop criterion are discussed in this paper. The latter criterion is based upon a normalized squared difference between the waveforms extrapolated from two different sets of initial data and it will be used as a means to stop the time domain simulation algorithm

The Importance of using Time Domain to Analyze the Effect of Decoupling Capacitor Performance on Printed Circuit Boards

This paper demonstrates the importance of using the time domain to properly analyze decoupling capacitor performance on printed circuit boards as well as ASIC packages, etc. Frequency domain analysis is too limited unless the phase information is used along with the magnitude information. the time domain analysis combines the magnitude and phase information to allow a more accurate analysis of decoupling capacitor distance, decoupling capacitor value, and the effects of connection inductance. the impact of connection inductance is extremely important, and it needs to be included in any decoupling capacitor analysis, since this inductance can easily overshadow low plane impedance (by buried capacitance, etc.) and make the Power Distribution Network (PDN) ineffective. © 2006 IEEE

Analytical Evaluation of Via-Plate Capacitance for Multilayer Printed Circuit Boards and Packages

The via-plate capacitance for a via transition to a multilayer printed circuit board is evaluated analytically in terms of higher order parallel-plate modes. The Green\u27s function in a bounded coaxial cavity for a concentric magnetic ring current is first derived by introducing reflection coefficients for cylindrical waves at the inner and outer cavity walls. These walls can be perfect electric conductor (PEC)/perfect magnetic conductor(PMC) or a nonreflective perfectly matched layer. by further assuming a magnetic frill current on the via-hole in the metal plate, an analytical formula is derived for the via barrel-plate capacitance by summing the higher order modes in the bounded coaxial cavity. The convergence of the formula with the number of modes, as well as with the radius of the outer PEC/PMC wall is discussed. The analytical formula is validated by both quasi-static numerical methods and measurements. Furthermore, the formula allows the investigation of the frequency dependence of the via-plate capacitance, which is not possible with quasi-static methods

Glyco-metabolic Effects of Ranolazine: A truly Multifaceted Drug?

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Complex Power Distribution Network Investigation Using SPICE Based Extraction from First Principle Formulations

The modeling and the analysis of the power distribution networks (PDN) within multi-layer printed circuit board is crucial for the investigation of the performance of PCB systems. Carrying out such analyses in SPICE based tools has the advantage of being faster than the corresponding full-wave modeling and it allows obtaining both frequency and time domain results

Validation of Circuit Extraction Procedure by Means of Frequency and Time Domain Measurement

Aim of this paper is the validation in both frequency and time domain of the procedure to extract fully H-Spice compatible equivalent circuits of structures on printed circuit boards. The procedure is initiated by standard measurement of scattering parameters between 40MHz to 20GH. After the extraction of the equivalent circuit, the computed scattering parameters are compared with those measured. The same equivalent circuit is also used for transient analysis in order to compare TDR measurement and eye-pattern to a pseudo-random bit sequence with those coming from the simulations

Early Time Charge Replenishment of the Power Delivery Network in Multi-Layer PCBs

The investigation of decoupling issues has been extensively treated in the literature in both the frequency and the time domain [1-9]. The two domains describe from different perspectives the same physical phenomenon, being related by a Fourier transform. In this article, well known decoupling issues usually addressed in the frequency domain [1,2] are discussed in the time domain. Moreover, some modeling issues related to the cavity model approach are discussed and, in particular, the circuit extraction feature associated with this methodology is utilized throughout the article to carry out the time domain simulations within a SPICE based-tool. The depletion of charges stored between the power bus is investigated in the time domain as a function of the plane thickness, SMT decoupling closeness and interconnect inductance values

Power Integrity Investigation of BGA Footprints by Means of the Segmentation Method

The engineering of the power delivery network is becoming a fundamental issue in the design of high speed digital systems on PCB\u27s. In fact, providing the required power to the different IC\u27s at the specified noisefree voltage levels allows a correct functioning of the overall PCB systems. More over, the ongoing trend of replacing active devices with peripherally located I/O and PWR/GND pins with areally located I/O and PWR/GND pins (BGA packaged) increases the complexity of the models, when power delivery issues need to be studied in a larger contest, such as the overall PCB\u27s. The employment of the powerful, but simple, concept of the segmentation method allows investigation of the power delivery network of the PCB systems in two fundamental stages. During the first stage, a small cut out of the board corresponding to the BGA footprint is modelled with a 3D full wave simulation tool. During the second stage the equivalent impedance network representation corresponding to this cut out is combined, by means of the segmentation method [1-5], with larger pieces of a board, whose network representations can be extracted from the closed form expression of the cavity model approach [6-9]

An Efficient Approach for Power Delivery Network Design with Closed-Form Expressions for Parasitic Interconnect Inductances

Investigation of a dc power delivery network, consisting of a multilayer PCB using area fills for power and return, involves the distributed behavior of the power/ground planes and the parasitics associated with the lumped components mounted on it. Full-wave methods are often employed to study the power integrity problem. While full-wave methods can be accurate, they are time and memory consuming. The cavity model of a rectangular structure has previously been employed to efficiently analyze the simultaneous switching noise (SSN) in the power distribution network. However, a large number of modes in the cavity model are needed to accurately simulate the impedance associated with the vias, leading to computational inefficiency. A fast approach is detailed herein to accelerate calculation of the summation associated with the higher-order modes. Closed-form expressions for the parasitics associated with the interconnects of the decoupling capacitors are also introduced. Combining the fast calculation of the cavity models of regularly shaped planar circuits, a segmentation method, and closed-form expressions for the parasitics, an efficient approach is proposed herein to analyze an arbitrary shaped power distribution network. While it may take many hours for a full-wave method to do a single simulation, the proposed method can generally perform the simulation with good accuracy in several minutes. Another advantage of the proposed method is that a SPICE equivalent circuit of the power distribution network can be derived. This allows both frequency and transient responses to be done with SPICE simulation