Mitochondria-Endoplasmic Reticulum Contact Sites Dynamics and Calcium Homeostasis Are Differentially Disrupted in PINK1-PD or PRKN-PD Neurons

Background: It is generally believed that the pathogenesis of PINK1/parkin-related Parkinson's disease (PD) is due to a disturbance in mitochondrial quality control. However, recent studies have found that PINK1 and Parkin play a significant role in mitochondrial calcium homeostasis and are involved in the regulation of mitochondria-endoplasmic reticulum contact sites (MERCSs). Objective: The aim of our study was to perform an in-depth analysis of the role of MERCSs and impaired calcium homeostasis in PINK1/Parkin-linked PD.MethodsIn our study, we used induced pluripotent stem cell-derived dopaminergic neurons from patients with PD with loss-of-function mutations in PINK1 or PRKN. We employed a split-GFP-based contact site sensor in combination with the calcium-sensitive dye Rhod-2 AM and applied Airyscan live-cell super-resolution microscopy to determine how MERCSs are involved in the regulation of mitochondrial calcium homeostasis. Results: Our results showed that thapsigargin-induced calcium stress leads to an increase of the abundance of narrow MERCSs in wild-type neurons. Intriguingly, calcium levels at the MERCSs remained stable, whereas the increased net calcium influx resulted in elevated mitochondrial calcium levels. However, PINK1-PD or PRKN-PD neurons showed an increased abundance of MERCSs at baseline, accompanied by an inability to further increase MERCSs upon thapsigargin-induced calcium stress. Consequently, calcium distribution at MERCSs and within mitochondria was disrupted. Conclusions: Our results demonstrated how the endoplasmic reticulum and mitochondria work together to cope with calcium stress in wild-type neurons. In addition, our results suggests that PRKN deficiency affects the dynamics and composition of MERCSs differently from PINK1 deficiency, resulting in differentially affected calcium homeostasis. © 2023 The Authors. Movement Disorders published by Wiley Periodicals LLC on behalf of International Parkinson and Movement Disorder Society

The Complete Genome Sequence of Fibrobacter succinogenes S85 Reveals a Cellulolytic and Metabolic Specialist

Fibrobacter succinogenes is an important member of the rumen microbial community that converts plant biomass into nutrients usable by its host. This bacterium, which is also one of only two cultivated species in its phylum, is an efficient and prolific degrader of cellulose. Specifically, it has a particularly high activity against crystalline cellulose that requires close physical contact with this substrate. However, unlike other known cellulolytic microbes, it does not degrade cellulose using a cellulosome or by producing high extracellular titers of cellulase enzymes. To better understand the biology of F. succinogenes, we sequenced the genome of the type strain S85 to completion. A total of 3,085 open reading frames were predicted from its 3.84 Mbp genome. Analysis of sequences predicted to encode for carbohydrate-degrading enzymes revealed an unusually high number of genes that were classified into 49 different families of glycoside hydrolases, carbohydrate binding modules (CBMs), carbohydrate esterases, and polysaccharide lyases. Of the 31 identified cellulases, none contain CBMs in families 1, 2, and 3, typically associated with crystalline cellulose degradation. Polysaccharide hydrolysis and utilization assays showed that F. succinogenes was able to hydrolyze a number of polysaccharides, but could only utilize the hydrolytic products of cellulose. This suggests that F. succinogenes uses its array of hemicellulose-degrading enzymes to remove hemicelluloses to gain access to cellulose. This is reflected in its genome, as F. succinogenes lacks many of the genes necessary to transport and metabolize the hydrolytic products of non-cellulose polysaccharides. The F. succinogenes genome reveals a bacterium that specializes in cellulose as its sole energy source, and provides insight into a novel strategy for cellulose degradation

Mutation based Feature Localization

The complexity of modern chip designs is rapidly increasing. More and more blocks from old designs are reused and third party IP is licensed to fulfill strict time-to-market constraints. Often, poor documentation of such blocks makes improvements and extensions of the blocks a difficult time consuming task. In this paper we propose a technique for automatically localizing the parts of the code which are relevant for a feature. With this a developer can better understand the design and, consequently, can adjust the design more efficiently. The proposed approach uses mutants changing the code of the design at a certain location. The code changed by a mutant is considered to be related to a feature if the mutant is killed while the feature is used. The use cases are generated using an automatic approach. This approach is based on a description specifying how the different features are used

Automatically connecting hardware blocks via light-weight matching techniques

In modern chip design, many different blocks are assembled in a single chip. Normally, these blocks have been written by different developers or even licensed from other companies. Correctly connecting all blocks is a tedious task. State of the art tools for automatically generating the connections either require identical port-names or additional user input describing the intended connections. In this paper we present an automatic approach for connecting different blocks. In contrast to previous approaches, we neither need exact name matching of the port-names nor additional user input. An evaluation showed the advantages of our approach. For seven of eight designs our approach generated better connections than a previous approach, including a design which has been optimized for being used with the previous approach. A second goal of this paper is to understand the limitations of the presented light-weight matching techniques

A simulation based approach for automated feature localization

The complexity of modern chips is rapidly increasing. To fulfill tight time-to-market constraints, more and more blocks from previous designs are reused or third party IP blocks are licensed. However, such blocks are often only poorly documented making adjustments to the blocks a difficult task. This paper presents a technique for automatic feature localization for hardware designs. Our approach helps a developer in understanding a design by localizing parts of the code which implement a certain feature of interest. We evaluate the approach on three open source designs. For those designs, our approach yields a more precise localization of the code implementing the different features than the documentation of the design

Mining Latency Guarantees for RT-level Designs

Modern integrated circuits are often multi-core designs connected via communication elements like buses, bridges, and routers. Each of these communication elements requires a certain amount of time, called latency, for transferring data. When a system interacts cyber-physically with the real world via sensors and actuators guaranteeing that the communication meets certain latency requirements and thus ensuring sufficient throughput is crucial. In this paper, we present a pragmatic approach to mine temporal properties that capture the symbolic conditions under which transferring data between two communication end-points within a given restriction for the latency can be guaranteed. In a first case-study, temporal properties of an RTlevel bus bridge design were mined considering different latency requirements