High-Performance Mixed-Signal Voltage-Mode Control for dc-dc Converters with inherent analog derivative action

This paper investigates a mixed-signal fixed frequency digital voltage-mode controller for dc-dc converters. Switch turn-on is determined by system clock, while switch turn-off is determined asynchronously by comparing a signal proportional to the derivative of the output voltage and the voltage ramp driven by the Digital-to-Analog Converter (DAC). One of the most important features is that the derivative action of the Proportional-Integral-Derivative (PID) voltage-mode controller is inherently obtained by a combination of the analog front-end and the hard-wired digital logic, without requiring the digital computation of the derivative action nor any analog derivative circuits. This property potentially enables wide-bandwidth controllers with improvement in dynamic performance respect to conventional digital controllers based on Analog-to-Digital Converters (ADCs) and Digital Pulse Width Modulators (DPWMs). The proposed control architecture is also effective from the IC point of view, since it is based on a DAC, a simple analog front-end and low digital signal-processing requirement. Simulation and experimental results on a 1.2 V - 20 A synchronous buck converter confirm the validity of the proposed solution

A low-complexity, high-performance digital control architecture for voltage regulator modules

This paper presents a new digital control architecture for voltage regulator modules, which employs only two digital-to-analog converters with low resolution (7 bit). The control strategy combines current programming and variable frequency operation, leading to negligible quantization effects. Both output voltage accuracy and stability are improved with respect to traditional digital solutions. The new architecture is designed to provide active current sharing and adaptive voltage positioning functions. A detailed description of the controller is given with reference to a single-phase buck converter. Extension to multiphase converters is straightforward. The control algorithm has been implemented into a commercial FPGA device by using only 2200 equivalent gates. Experimental results from a four-phase converter based on the proposed control architecture are presented

Synchronous Asynchronous Digital Voltage-mode control for DC-DC converters

This paper investigates a mixed synchronous/asynchronous digital voltage-mode controller for DC-DC converters. In the proposed control architecture, the turn-on switching event is determined asynchronously by comparing the converter output voltage and a synchronously generated voltage ramp driven by the digital control using a low-resolution digital-to-analog converter. Switch turn-off is determined synchronously by the system clock. In the proposed approach, the derivative action of the proportional-integral-derivative voltage-mode controller is inherently obtained by the frequency modulation, without requiring the digital computation of the derivative action. A simplified small-signal model is also derived in order to analyze the performance achievable by the proposed solution. This control architecture features good dynamic performance, and frequency modulation during transients. Simulation and experimental results on a synchronous buck converter, where the digital control has been implemented in field programmable gate array, confirm the effectiveness of the proposed solution

\u201cDigital Controller for DC-DC Switching Converters\u201d

A voltage regulator includes an input terminal adapted for being coupled to an input voltage and an output terminal adapted for being coupled to a load. The voltage regulator includes a first switch adapted for selectively coupling to the input terminal and to the output terminal, a current sensor for measuring an output current flowing towards the output terminal, a voltage sensor for measuring the output voltage from the output terminal, and a digital controller which drives the first switch. The controller closes the first switch when the error voltage is less than a first preset value of voltage and opens the first switch when the output current is greater than a first preset value of current

A PID autotuning method for digitally controlled DC-DC boost converters

This paper proposes a simple PID autotuning technique for digitally controlled DC-DC boost converters using the relay feedback technique. Controller parameter tuning is obtained introducing small perturbations on the output voltage by including a relay in the control feedback and ensuring closed-loop operation during the autotuning procedure. Moreover, including the PID regulator in the relay feedback loop, the controller parameters are directly tuned according to the specified dynamic requirement. The proposed algorithm is simple, it requires small tuning times and it is fully compliant with the cost/complexity constraints of integrated digital ICs. Simulation results and experimental results confirm the validity and effectiveness of the proposed solutio

\u201cMethod for controlling a Full Bridge converter with a Current-Doubler\u201d

A method controls a Full Bridge converter with a Current-Doubler of the type including at least a first and a second half-bridges of diodes connected to respective control transistors. The method includes detecting a reference value, comparing, instant by instant, the reference value with an output voltage value of the converter, and carrying out a switching from a transfer phase to an energy recirculation phase in correspondence with instants when the output voltage value reaches the reference value

Silicon planar technology for single-photon optical detectors

In this paper we report the results relative to the design and fabrication of Single Photon Avalanche Detectors (SPAD) operating at low voltage in planar technology. These silicon sensors consist of pn junctions that are able to remain quiescent above the breakdown voltage until a photon is absorbed in the depletion volume. This event is detected through an avalanche current pulse. Device design and critical issues in the technology are discussed. Experimental test procedures are then described for dark-counting rate, afterpulsing probability, photon timing resolution, quantum detection efficiency. Through these experimental setups we have measured the electrical and optical performances of different SPAD technology generations. The results from these measurements indicate that in order to obtain low-noise detectors it is necessary to introduce a local gettering process and to realize the diode cathode through in situ doped polysilicon deposition. With such technology low noise detectors with dark counting rates at room temperature down to 10c/s for devices with 10μm diameter, down to 1kc/s for 50μm diameter have been obtained. Noticeable results have been obtained also as far as time jitter and quantum detection efficiency are concerned. This technology is suitable for monolithic integration of SPAD detectors and associated circuits. Small arrays have already been designed and fabricated. Preliminary results indicate that good dark count rate uniformity over the different array pixels has already been obtained