The Superconducting TESLA Cavities

The conceptional design of the proposed linear electron-positron collider TESLA is based on 9-cell 1.3 GHz superconducting niobium cavities with an accelerating gradient of Eacc >= 25 MV/m at a quality factor Q0 > 5E+9. The design goal for the cavities of the TESLA Test Facility (TTF) linac was set to the more moderate value of Eacc >= 15 MV/m. In a first series of 27 industrially produced TTF cavities the average gradient at Q0 = 5E+9 was measured to be 20.1 +- 6.2 MV/m, excluding a few cavities suffering from serious fabrication or material defects. In the second production of 24 TTF cavities additional quality control measures were introduced, in particular an eddy-current scan to eliminate niobium sheets with foreign material inclusions and stringent prescriptions for carrying out the electron-beam welds. The average gradient of these cavities at Q0 = 5E+9 amounts to 25.0 +- 3.2 MV/m with the exception of one cavity suffering from a weld defect. Hence only a moderate improvement in production and preparation techniques will be needed to meet the ambitious TESLA goal with an adequate safety margin. In this paper we present a detailed description of the design, fabrication and preparation of the TESLA Test Facility cavities and their associated components and report on cavity performance in test cryostats and with electron beam in the TTF linac. The ongoing R&D towards higher gradients is briefly addressed.Comment: 45 pages (Latex), 39 figures (Encapsulated Postscript), 53 Author

Mathematical Systems Theory 01977 by S-r-Vab Ner Yori Ins. On the Characterization of Linear and Linearizable Automata by a Superposition Principle

Abstract. This paper deals with the superponability of linear and lineariz-able automata. Automata linear in GF(p), p>2, with input and output sets (0, 1,...,p- 1) and with arbitrary initial state are characterized as the class of automata superponable, i.e. permutable, with respect to a function ax+ l(1- a)xf. The case p=2 requires special considerations. The input-output behaviour of this automata can be descnbed by generalized impulse responses. Using instead of GF(p) an arbitrary commutative field on the same basic set (0, 1,...,p- 1) some of the functions nonlinear in GF(p) are linear in this field. These functions are called lineanzable. Linearizable functions are characterized by a functional equation and solvability condi-tions and as polynomials in GF(p). Thus the well known theory of linear automata can be extended to linearizable automata

A Structural Approach for Space Compaction for Concurrent Checking and BIST

In this paper a new structural method for linear output space compaction is presented. The method is applicable to concurrent checking and built-in self test (BIST). Based on simple estimates for the probabilities of the existence of sensitized paths from the signal lines to the circuit outputs output partitions are determined without fault simulation. For all ISCAS 85 benchmark circuits three groups of compacted outputs are sufficient to achieve 100% fault coverage in test mode and for 3 to 5 groups an error detection probability of 98% is obtained in on-line mode. The method can be applied to very large circuits

THEIR CHARACTERIZATION BY A SUPERPOSITION PRINCIPLE AND STATE DEPENDING MODELLING

As a generalization of the theory of linear automata the so called L?-linear, in general timedependent automata- where J? is an arbitrarily choosen "lattice-iike " universalalgebraare characterized by generalized superpositon principles. The description of the input-mtput behaviour of ß-linear automata by generalized impulse-responses is given and the explicite statedepending modeliing of L?-linear automata, whose generalized impulse-responses are known, is presented

Design of Self-Dual Fault-Secure Combinational Circuits

The method of alternating inputs is an interesting combination of time- and hardware-redundancy for error detection of self-dual circuits. In this paper it is shown how a combinational self-dual circuit can be transformed into a self-dual fault-secure circuit. For 82% of the benchmark circuits the necessary average area overhead is only 8,81%. A selfdual circuit is called self-dual fault-secure it every error due to a single stuck-at fault is immediately detected. Faults are detected if, for alternating inputs, the outputs of the faulty circuit are not alternating