Membrane Potential Distribution Adjustment and Parametric Surrogate Gradient in Spiking Neural Networks

As an emerging network model, spiking neural networks (SNNs) have aroused significant research attentions in recent years. However, the energy-efficient binary spikes do not augur well with gradient descent-based training approaches. Surrogate gradient (SG) strategy is investigated and applied to circumvent this issue and train SNNs from scratch. Due to the lack of well-recognized SG selection rule, most SGs are chosen intuitively. We propose the parametric surrogate gradient (PSG) method to iteratively update SG and eventually determine an optimal surrogate gradient parameter, which calibrates the shape of candidate SGs. In SNNs, neural potential distribution tends to deviate unpredictably due to quantization error. We evaluate such potential shift and propose methodology for potential distribution adjustment (PDA) to minimize the loss of undesired pre-activations. Experimental results demonstrate that the proposed methods can be readily integrated with backpropagation through time (BPTT) algorithm and help modulated SNNs to achieve state-of-the-art performance on both static and dynamic dataset with fewer timesteps.Comment: 10 pages, 8 figure

A Memetic Algorithm Configured Via a Problem Solving Environment for the Hamiltonian Cycle Problems

Algorithm Development Environment for Permutation-based problems (ADEP) is a software environment for configuring meta-heuristics for solving combinatorial optimization problems. This paper describes the key features of ADEP and how the environment was used to generate a Memetic Algorithm (MA) solution for Hamiltonian Cycle Problems (HCP). The effectiveness of the MA algorithm is demonstrated through computer simulations and its performance is compared with backtracking and other heuristic techniques such as Simulated Annealing, Tabu Search, and Ant Colony Optimization

Towards Believable Resource Gathering Behaviours in Real-time Strategy Games with a Memetic Ant Colony System

AbstractIn this paper, the resource gathering problem in real-time strategy (RTS) games, is modeled as a path-finding problem where game agents responsible for gathering resources, also known as harvesters, are only equipped with the knowledge of its immediate sur- roundings and must gather knowledge about the dynamics of the navigation graph that it resides on by sharing information and cooperating with other agents in the game environment. This paper proposed the conceptual modeling of a memetic ant colony system (MACS) for believable resource gathering in RTS games. In the proposed MACS, the harvester's path-finding and resource gathering knowledge captured are extracted and represented as memes, which are internally encoded as state transition rules (mem- otype), and externally expressed as ant pheromone on the graph edge (sociotype). Through the inter-play between the memetic evolution and ant colony, harvesters as memetic automatons spawned from an ant colony are able to acquire increasing level of capability in exploring complex dynamic game environment and gathering resources in an adaptive manner, producing consistent and impressive resource gathering behaviors

Guest editorial : special issue on engineering applications of memetic computing

The seven full papers and one technical correspondence in this special issue focus on the engineering applications of memetic computing

FPGA-based Built-in Testbed for Command Interpretations and Computational Load Distribution

A testbed with built-in data processing capability is presented in this paper. The built-in testbed is designed for a small form factor storage protocol. In the market, there are several dedicated test equipments supporting the protocol of the storage device. However, they are more suitable in the development stage. A built-in testbed which is suitable for both the development stage and production stage will benefit the industry. The most computing power relies on a FPGA, which is with high processing throughput. It releases the test host from the heavy computational load. It makes the dedicated test equipments to be unnecessary, which is eventually replaced by a normal person computer (PC). The hardware architecture of the proposed testbed is described in detail in this paper