41 research outputs found
Improved Secure Address Resolution Protocol
In this paper, an improved secure address resolution protocol is presented
where ARP spoofing attack is prevented. The proposed methodology is a
centralised methodology for preventing ARP spoofing attack. In the proposed
model there is a central server on a network or subnet which prevents ARP
spoofing attack.Comment: 10 pages, 15 figures, paper selected in fifth international
conference of communications security and information assurance 201
Modeling Data Reuse in Deep Neural Networks by Taking Data-Types into Cognizance
In recent years, researchers have focused on reducing the model size and
number of computations (measured as "multiply-accumulate" or MAC operations) of
DNNs. The energy consumption of a DNN depends on both the number of MAC
operations and the energy efficiency of each MAC operation. The former can be
estimated at design time; however, the latter depends on the intricate data
reuse patterns and underlying hardware architecture. Hence, estimating it at
design time is challenging. This work shows that the conventional approach to
estimate the data reuse, viz. arithmetic intensity, does not always correctly
estimate the degree of data reuse in DNNs since it gives equal importance to
all the data types. We propose a novel model, termed "data type aware weighted
arithmetic intensity" (), which accounts for the unequal importance of
different data types in DNNs. We evaluate our model on 25 state-of-the-art DNNs
on two GPUs. We show that our model accurately models data-reuse for all
possible data reuse patterns for different types of convolution and different
types of layers. We show that our model is a better indicator of the energy
efficiency of DNNs. We also show its generality using the central limit
theorem.Comment: Accepted at IEEE Transactions on Computers (Special Issue on
Machine-Learning Architectures and Accelerators) 202
E2GC: Energy-efficient Group Convolution in Deep Neural Networks
The number of groups () in group convolution (GConv) is selected to boost
the predictive performance of deep neural networks (DNNs) in a compute and
parameter efficient manner. However, we show that naive selection of in
GConv creates an imbalance between the computational complexity and degree of
data reuse, which leads to suboptimal energy efficiency in DNNs. We devise an
optimum group size model, which enables a balance between computational cost
and data movement cost, thus, optimize the energy-efficiency of DNNs. Based on
the insights from this model, we propose an "energy-efficient group
convolution" (E2GC) module where, unlike the previous implementations of GConv,
the group size () remains constant. Further, to demonstrate the efficacy of
the E2GC module, we incorporate this module in the design of MobileNet-V1 and
ResNeXt-50 and perform experiments on two GPUs, P100 and P4000. We show that,
at comparable computational complexity, DNNs with constant group size (E2GC)
are more energy-efficient than DNNs with a fixed number of groups (FGC). For
example, on P100 GPU, the energy-efficiency of MobileNet-V1 and ResNeXt-50 is
increased by 10.8% and 4.73% (respectively) when E2GC modules substitute the
FGC modules in both the DNNs. Furthermore, through our extensive
experimentation with ImageNet-1K and Food-101 image classification datasets, we
show that the E2GC module enables a trade-off between generalization ability
and representational power of DNN. Thus, the predictive performance of DNNs can
be optimized by selecting an appropriate . The code and trained models are
available at https://github.com/iithcandle/E2GC-release.Comment: Accepted as a conference paper in 2020 33rd International Conference
on VLSI Design and 2020 19th International Conference on Embedded Systems
(VLSID
ULSAM: Ultra-Lightweight Subspace Attention Module for Compact Convolutional Neural Networks
The capability of the self-attention mechanism to model the long-range
dependencies has catapulted its deployment in vision models. Unlike convolution
operators, self-attention offers infinite receptive field and enables
compute-efficient modeling of global dependencies. However, the existing
state-of-the-art attention mechanisms incur high compute and/or parameter
overheads, and hence unfit for compact convolutional neural networks (CNNs). In
this work, we propose a simple yet effective "Ultra-Lightweight Subspace
Attention Mechanism" (ULSAM), which infers different attention maps for each
feature map subspace. We argue that leaning separate attention maps for each
feature subspace enables multi-scale and multi-frequency feature
representation, which is more desirable for fine-grained image classification.
Our method of subspace attention is orthogonal and complementary to the
existing state-of-the-arts attention mechanisms used in vision models. ULSAM is
end-to-end trainable and can be deployed as a plug-and-play module in the
pre-existing compact CNNs. Notably, our work is the first attempt that uses a
subspace attention mechanism to increase the efficiency of compact CNNs. To
show the efficacy of ULSAM, we perform experiments with MobileNet-V1 and
MobileNet-V2 as backbone architectures on ImageNet-1K and three fine-grained
image classification datasets. We achieve 13% and 25%
reduction in both the FLOPs and parameter counts of MobileNet-V2 with a 0.27%
and more than 1% improvement in top-1 accuracy on the ImageNet-1K and
fine-grained image classification datasets (respectively). Code and trained
models are available at https://github.com/Nandan91/ULSAM.Comment: Accepted as a conference paper in 2020 IEEE Winter Conference on
Applications of Computer Vision (WACV
DRACO: Co-Optimizing Hardware Utilization, and Performance of DNNs on Systolic Accelerator
The number of processing elements (PEs) in a fixed-sized systolic accelerator is well matched for large and compute-bound DNNs; whereas, memory-bound DNNs suffer from PE underutilization and fail to achieve peak performance and energy efficiency. To mitigate this, specialized dataflow and/or micro-architectural techniques have been proposed. However, due to the longer development cycle and the rapid pace of evolution in the deep learning fields, these hardware-based solutions can be obsolete and ineffective in dealing with PE underutilization for state-of-the-art DNNs. In this work, we address the challenge of PE underutilization at the algorithm front and propose data reuse aware co-optimization (DRACO). This improves the PE utilization of memory-bound DNNs without any additional need for dataflow/micro-architecture modifications. Furthermore, unlike the previous co-optimization methods, DRACO not only maximizes performance and energy efficiency but also improves the predictive performance of DNNs. To the best of our knowledge, DRACO is the first work that resolves the resource underutilization challenge at the algorithm level and demonstrates a trade-off between computational efficiency, PE utilization, and predictive performance of DNN. Compared to the state-of-the-art row stationary dataflow, DRACO achieves 41.8% and 42.6% improvement in average PE utilization and inference latency (respectively) with negligible loss in predictive performance in MobileNetV1 on a 64×64 systolic array. DRACO provides seminal insights for utilization-aware DNN design methodologies that can fully leverage the computation power of systolic array-based hardware accelerators. © 2020 IEEE
DeepPeep: Exploiting Design Ramifications to Decipher the Architecture of Compact DNNs
The remarkable predictive performance of deep neural networks (DNNs) has led to their adoptionin service domains of unprecedented scale and scope. However, the widespread adoption and growing commercialization of DNNs have underscored the importance of intellectual property (IP) protection. Devising techniques to ensure IP protection has become necessary due to the increasing trend of outsourcing the DNN computations on the untrusted accelerators in cloud-based services. The design methodologies and hyper-parameters of DNNs are crucial information, and leaking them may cause massive economic loss to the organization. Furthermore, the knowledge of DNN's architecture can increase the success probability of an adversarial attack where an adversary perturbs the inputs and alters the prediction. In this work, we devise a two-stage attack methodology "DeepPeep,"which exploits the distinctive characteristics of design methodologies to reverse-engineer the architecture of building blocks in compact DNNs. We show the efficacy of "DeepPeep"on P100 and P4000 GPUs. Additionally, we propose intelligent design maneuvering strategies for thwarting IP theft through the DeepPeep attack and proposed "Secure MobileNet-V1."Interestingly, compared tovanilla MobileNet-V1, secure MobileNet-V1 provides a significant reduction in inference latency (≈60%) and improvement in predictive performance (≈2%) with very low memory and computation overheads. © 2020 ACM