1 research outputs found
A low power and soft error resilience guard-gated Quartro-based flip-flop in 45 nm CMOS technology
Abstract Conventional flipāflops are more vulnerable to particle strikes in a radiation environment. To overcome this disadvantage, in the literature, many radiationāhardened flipāflops (FFs) based on techniques like triple modular redundancy, dual interlocked cell, Quatro and guardāgated Quatro cell, and so on, are discussed. The flipāflop realized using radiation hardened by design Quatro cell is named as the improved version of Quatro flipāflop (IVQFF). Single event upset (SEU) at inverter stages of master/slave and at output are the two drawbacks of IVQFF. This study proposes a guardāgated Quatro FF (GQFF) using guardāgated Quatro cell and Muller Cāelement. To overcome the SEU at inverter stages of IVQFF, in GQFF, the inverter stages are realized in a parallel fashion. A dualāinput Muller Cāelement is connected to the GQFF output stage to mask the SEU and thus maintain the correct output. The proposed GQFF tolerates both single node upset (SNU) and double node upset (DNU). It also achieves low power. To prove the efficacy, GQFF and the existing FFs are implemented in 45 nm Complementary Metal Oxide Semiconductor (CMOS) technology. From the simulation results, it may be noted that the GQFF is 100% immune to SNUs and 50% immune to DNUs