Functional layers for CIGS solar cell on-chip fabrication during post-processing

The ubiquitous deploying of wireless electronic devices due to pervasive computing results in the idea of Energy Scavenging, i.e., harvesting ambient energy from surroundings of the electronic devices [1]. As an approach to the most practical realization of such an energy scavenger, copper indium gallium selenium (CIGS) thin-film solar cells have attracted much attention due to the possibility to combine their reasonably high efficiency and low-temperature fabrication technology. The CIGS solar cells can be realized using CMOS compatible technology and are therefore suitable for CMOS post-processing and for their integration on a silicon chip as the energy scavenger

Cross-bidge Kelvin resistor (CBKR) structures for measurement of low contact resistances

A convenient test structure for measurement of the specific contact resistance (ρc) of metal-semiconductor junctions is the CBKR structure. During last few decades the parasitic factors which may strongly affect the measurements accuracy for ρc < 10-6 Ω • cm2 have been sufficiently discussed and the minimum of the ρc to be measured using CBKR structures was estimated. We fabricated a set of CBKR structures with different geometries to confirm this limit experimentally. These structures were manufactured for metal-to-metal contacts. It was found that the extracted CBKR values were determined by dimensions of the two-metal stack in the contact area and sheet resistances of the metals used. \ud Index Terms—Contact resistance, cross-bridge Kelvin resistor (CBKR), sheet resistance, test structures, metal, silico

Low-Stress Highly-Conductive In-Situ Boron Doped Ge_0.7Si_0.3 Films by LPCVD

This paper reports on low pressure chemical vapor deposited in-situ boron doped polycrystalline germanium-silicon layers with 70% germanium content. The effect of diborane partial pressure on the properties of the GeSi alloy is investigated. The obtained high boron concentration results in resistivity values less than 1 m_-cm. The layers deposited at low partial pressures of B2H6 exhibit very low stress down to –3MPa.With increasing B2H6 partial pressure first the stress changes from tensile to compressive, followed by a phase transition from polycrystalline to amorphous. The highly doped, low stress poly-Ge0.7Si0.3 layers deposited at 430◦C are further applied in high-Q microelectromechanical resonators envisaged for above-IC integration with CMOS

Electrical properties of plasma-deposited silicon oxide clarified by chemical modeling

Our study is focused on Plasma Enhanced Chemical Vapor Deposition (PECVD) of silicon dioxide films at low temperatures (< 150 oC) using Inductively Coupled (IC) High-Density (HD) plasma source. We recently fabricated Thin Film Transistors (TFTs) with high-quality ICPECVD gate oxides, which exhibited a competitive performance. For better understanding of the influence of deposition parameters on both the deposition kinetics and oxide quality, we have modeled the Ar-SiH4-N2O plasma system with 173 chemical reactions. We simulated concentrations of 43 reactive species (such as e.g. SiHx radicals and SiHx + (x=0-3) ions, polysilanes, SiO, SiN, SiH3O, SiH2O, HSiO, etc., as well as atomic hydrogen, nitrogen and oxygen) in plasma. We further used our simulations to qualitatively explain (in terms of concentrations of the reactive species) the influence of SiH4/N2O gas-flow ratio and total gas pressure on film electrical properties and deposition rate

Electrical characterisation of gate dielectrics deposited with multipolar electron cyclotron resonance plasma source

Silicon oxide films have been deposited by plasma-enhanced chemical vapour deposition, at glass compatible temperatures. A multipolar electron cyclotron resonance plasma (ECR) source with SiH4/He and N2O was used. The electrical properties of the films were determined by means of C-V and I-V measurements. The dependencies of the electrical properties on gas-flow ratio and pressure were investigated. Critical electric fields as high as 6 MV/cm and net oxide charge densities as low as 1×1011 ions/cm2 have been obtained for the optimal deposition conditions. The oxide integrity versus CVD conditions was investigated by charge to breakdown measurements. MOSFETs have been fabricated in order to test the dielectric quality