Continuation-Based Pull-In and Lift-Off Simulation Algorithms for Microelectromechanical Devices

The voltages at which microelectromechanical actuators and sensors become unstable, known as pull-in and lift-off voltages, are critical parameters in microelectromechanical systems (MEMS) design. The state-of-the-art MEMS simulators compute these parameters by simply sweeping the voltage, leading to either excessively large computational cost or to convergence failure near the pull-in or lift-off points. This paper proposes to simulate the behavior at pull-in and lift-off employing two continuation-based algorithms. The first algorithm appropriately adapts standard continuation methods, providing a complete set of static solutions. The second algorithm uses continuation to trace two kinds of curves and generates the sweep-up or sweep-down curves, which can provide more intuition for MEMS designers. The algorithms presented in this paper are robust and suitable for general-purpose industrial MEMS designs. Our algorithms have been implemented in a commercial MEMS/integrated circuits codesign tool, and their effectiveness is validated by comparisons against measurement data and the commercial finite-element/boundary-element (FEM/BEM) solver CoventorWare

Computational Prototyping Tools and Techniques

Contains reports on five research projects.Industry Consortium (Mobil, Statoil, DNV Software, Shell, OTRC, Petrobras, NorskHydro, Exxon, Chevron, SAGA, NSWC)U.S. Navy - Office of Naval ResearchAnalog DevicesDefense Advanced Research Projects Agency Contract J-FBI-95-215Cadence Design SystemsHarris SemiconductorMAFET ConsortiumMotorola SemiconductorDefense Advanced Research Projects AgencyMultiuniversity Research InitiativeSemiconductor Research CorporationIBM Corporatio

Custom Integrated Circuits

Contains table of contents for Part III, table of contents for Section 1 and reports on eleven research projects.IBM CorporationMIT School of EngineeringNational Science Foundation Grant MIP 94-23221Defense Advanced Research Projects Agency/U.S. Army Intelligence Center Contract DABT63-94-C-0053Mitsubishi CorporationNational Science Foundation Young Investigator Award Fellowship MIP 92-58376Joint Industry Program on Offshore Structure AnalysisAnalog DevicesDefense Advanced Research Projects AgencyCadence Design SystemsMAFET ConsortiumConsortium for Superconducting ElectronicsNational Defense Science and Engineering Graduate FellowshipDigital Equipment CorporationMIT Lincoln LaboratorySemiconductor Research CorporationMultiuniversity Research IntiativeNational Science Foundatio

Fast parasitic extraction and simulation of three-dimensional interconnect via quasistatic analysis

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998.Includes bibliographical references (p. 167-172).by Mattn Kamon.Ph.D

Efficient techniques for inductance extraction of complex 3-D geometries

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.Includes bibliographical references (p. 79-80).by Mattan Kamon.M.S

Algorithms for Coupled Transient Simulation of Circuits and Complicated 3-D Packaging

In this paper techniques are described for coupled simulation of complicated 3-D interconnect and nonlinear transistor drivers and receivers. The approach is based on combining: multipole-accelerated methodof -moments techniques for extracting frequency- dependent inductances and resistances for the interconnect; a sectioning method for fitting the frequencydomain data with a rational function; a balancedrealization approach to reducing the order of the rational function in a guaranteed stable manner; and an implementation of fast recursive convolution to incorporate the rational function in sPIClg3. Results are presented to demonstrate some of the frequencydependent effects in a packaging analysis problem

Efficient Reduced-Order Modeling of Frequency-Dependent Coupling Inductances associated with 3-D Interconnect Structures

Reduced-order modeling techniques are now commonly used to efficiently simulate circuits combined with interconnect, but generating reduced-order mod- els from realistic 3-D structures has received less at- tention. In this paper we describe a Krylov-subspace based method for deriving reduced-order models directly from the 3-D magnetoquasistatic analysis program FASTHENRY. This new approach is no more expensive than computing an impedance matrix at a single frequency

Direct Computation of Reduced-Order Models for Circuit Simulation of 3-D Interconnect Structures

This paper describes an accurate and efficient approach for using a modification of the iterative method in the 3-D magnetoquasistatics-based field solver FASTHENRY to compute reduced-order models of frequency-dependent impedance ma- trices. The reduced-order models can then be used in a circuit simulator to perform coupled circuit-packaging analysis