A Deep Registration Method for Accurate Quantification of Joint Space Narrowing Progression in Rheumatoid Arthritis

Rheumatoid arthritis (RA) is a chronic autoimmune inflammatory disease that results in progressive articular destruction and severe disability. Joint space narrowing (JSN) progression has been regarded as an important indicator for RA progression and has received sustained attention. In the diagnosis and monitoring of RA, radiology plays a crucial role to monitor joint space. A new framework for monitoring joint space by quantifying JSN progression through image registration in radiographic images has been developed. This framework offers the advantage of high accuracy, however, challenges do exist in reducing mismatches and improving reliability. In this work, a deep intra-subject rigid registration network is proposed to automatically quantify JSN progression in the early stage of RA. In our experiments, the mean-square error of Euclidean distance between moving and fixed image is 0.0031, standard deviation is 0.0661 mm, and the mismatching rate is 0.48\%. The proposed method has sub-pixel level accuracy, exceeding manual measurements by far, and is equipped with immune to noise, rotation, and scaling of joints. Moreover, this work provides loss visualization, which can aid radiologists and rheumatologists in assessing quantification reliability, with important implications for possible future clinical applications. As a result, we are optimistic that this proposed work will make a significant contribution to the automatic quantification of JSN progression in RA.Comment: 11 pages, 9 figures, 7 table

Warm-cool color-based high-speed decolorization: an empirical approach for tone mapping applications

Grayscale images are fundamental to many image processing applications, such as data compression, feature extraction, printing, and tone mapping. However, some image infor-mation is lost when converting from color to grayscale. We propose a lightweight and high-speed image decolorization method based on human perception of color temperatures. Chromatic aber-ration results from differential refraction of light depending on its wavelength. It causes some rays corresponding to cooler colors (such as blue, green) to converge before the warmer colors (such as red and orange). This phenomenon creates a perception of warm colors "advancing" toward the eye, whereas the cool colors to be "receding" away. In this proposed color-to-gray conversion model, we implement a weighted blending function to combine red (perceived warm) and blue (perceived cool) channels. Our main contribution is threefold. First, we implement a high-speed color processing method using exact pixel-by-pixel processing, and we report a 5.7x speed up compared with other new algorithms. Second, our optimal color conversion method produces luminance in images that are comparable to other state-of-the-art methods that we quantified using the objective metrics (E-score and C2G-SSIM) and subjective user studies (decolorization and tone mapping). Third, we demonstrate that an effective luminance distri-bution can be achieved using our algorithm using global and local tone mapping applications. (C) 2021 SPIE and IS&

Design and fabrication of 2.4 GHz pre-biased rectifier

A 2.4 GHz rectifier operating in a region of low RF input power was developed. The rectifier has a cross-coupled bridge configuration and is driven by a differential RF input signal. Since a rectifier needs an RF signal higher than the threshold voltage of transistors, we introduced a pre-biasing circuit to compensate for the threshold voltage. A low-voltage digital circuit, subthreshold voltage regulator, and low-power level shifter were introduced for reducing the power consumption of the pre-biasing circuit and increasing the driving voltage for the switches at the same time. The circuit simulations revealed that the pre-biasing circuit was effective in a low RF input power region. However, the output voltage was degraded in a high power region. Then, we combined the pre-biased rectifier in parallel with a non-biased rectifier. Three types of rectifiers consisting of LC matching circuits, three-stage rectifier cells, and biasing circuits were designed and fabricated using a 0.18-mu m mixed signal/RF CMOS process with one poly and six metal layers. The fabricated pre-biased rectifier operated in a region of RF input power of less than -15 dBm, while the non-biased rectifier could not operate in this region. The parallel combination of pre-biased and non-biased rectifiers effectively solved the drawback of the pre-biased rectifier in a high RF input power region

O(1) bilateral filtering with low memory usage

We propose a O(1) algorithm for bilateral filter with low memory usage. Bilateral filter can be converted into weighted histogram operation. Applying line buffers of column histograms, we can reduce the number of calculation needed to construct recursive center-weighted local histogram. Also our method have advantage in terms of memory requirements. We used a 2-GHz CPU with our method and achieved one million pixels per 0.5 sec operation and high PSNR over 40 dB without the need for temporary frame buffers or additional instructions (downsampling, SIMD instructions, or multi-thread operations)

An energy-efficient dynamic branch predictor with a two-clock-cycle naive Bayes classifier for pipelined RISC microprocessors

In this paper, we propose a Bayesian branch-prediction circuit, consisting of an instruction-feature extractor and a naive Bayes classifier (NBC), as a machine learning approach for branch prediction. A branch predictor predicts the outcome of a branch instruction by analyzing the pattern of the previous branch outcome. In other words, branch prediction can be viewed as a type of pattern recognition problem, and such problems are often solved using neural networks. A perceptron branch predictor has already been proposed as one example of a neural branch prediction architecture, which predicts the next branch outcome by using past branch history to form feature vectors. The proposed circuit is constructed by replacing the arithmetic unit (neurons) in conventional neural branch predictors with an NBC. By introducing an approximate Bayesian computation and its parallel architectures, the NBC circuit completes branch prediction within two clock cycles per instruction. This constitutes a suitable replacement for conventional branch predictors in modern pipelined reduced instruction set computing microprocessors

Pixel Variation Characteristics of a Global Shutter THz Imager and its Calibration Technique

We have developed a Si-CMOS terahertz image sensor to address the paucity of low-cost terahertz detectors. Our imaging pixel directly connects to a VCO-based ADC and achieves pixel parallel ADC architecture for high-speed global shutter THz imaging. In this paper, we propose a digital calibration technique for offset and gain variation of each pixel using global shutter operation. The calibration technique gives ref-erence signal to all pixels simultaneously and takes reference frames as a part of the high-speed image captures. Using this technique, we achieve offset/non-linear gain variation suppression of 85.7% compared to without correction

2.4GHz wake-up receiver with suppressed substrate noise coupling

The switching noise generated in digital circuits propagates through conductive silicon substrate to analog circuits in a mixed-signal CMOS LSI. Substrate noise coupling may degrade the performance of the analog circuits, and may result in a fault operation of the mixed-signal LSI in the worst-case. In this paper, the substrate noise coupling between the clock recovery circuit and the input port of the envelop detector in a low-power wake-up receiver (WuRx) was investigated experimentally. The propagation path of the substrate noise coupling was clarified by comparing the experimental results with the circuit simulations on the basis of an equivalent circuit model. The design of the WuRx was modified on the basis of the findings to suppress the substrate noise coupling. The fabricated WuRx successfully operated a 100-kbps PWM signal with a carrier frequency of 2.4GHz, and the effectiveness of the noise coupling suppression recipe was confirmed

Low-power wake-up receiver with subthreshold CMOS circuits for wireless sensor networks

We developed a wake-up receiver comprised of subthreshold CMOS circuits. The proposed receiver includes an envelope detector, a high-gain baseband amplifier, a clock and data recovery (CDR) circuit, and a wake-up signal recognition circuit. The drain nonlinearity in the subthreshold region effectively detects the baseband signal with a microwave carrier. The offset cancellation method with a biasing circuit operated by the subthreshold produces a high gain of more than 100 dB for the baseband amplifier. A pulse-width modulation (PWM) CDR drastically reduces the power consumption of the receiver. A 2.4-GHz detector, a high-gain amplifier and a PWM clock recovery circuit were designed and fabricated with 0.18-mu m CMOS process with one poly and six metal layers. The fabricated detector and high-gain amplifier achieved a sensitivity of -47.2 dBm while consuming only 6.8 mu W from a 1.5 V supply. The fabricated clock recovery circuit operated successfully up to 500 kbps

Low-power, small-size transmitter module with metamaterial antenna

Development of a low-power, small-size transmitter is needed for wireless sensor networks. An effective way to reduce power consumption is to reduce the operating time in a voltage-controlled oscillator. In this study, a 2.4 GHz on-off keying transmitter circuit is designed and implemented with an electrically small antenna using a left-handed transmission line. The transmitter circuit was fabricated with a standard 0.18 mu m CMOS technology, while the antenna was fabricated with a 3.0 x 4.5 cm printed circuit board, chip capacitors, and chip inductors. Measured output power was -6.8 dBm with a power consumption of 3.59 mW when the baseband signal was always "high". The power consumption was reduced to 1.96 mW for the baseband signal with a mark ratio of 0.5