Thermal annealing of ZnS:Mn TFEL devices fabricated with an organometallic precursor-based ALD process.

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Low-temperature epitaxial SiGe:P for gate-all-around n-channel metal-oxide-semiconductor devices

This study investigates the viability of Si1−xGex:P (x ⩽ 0.3) as a novel source/drain material for n-channel Metal-Oxide-Semiconductor for Gate-All-Around (GAA) transistors, addressing the challenges posed by the evolving semiconductor technology. Utilizing a reduced-pressure chemical vapor deposition system, undoped SiGe with low Ge contents were grown at temperatures of ⩽500 °C. The addition and optimization of phosphorous doping using phosphine results in improved surface morphology and increased active carrier concentration. The study compares Si1−xGex:P with different silicon precursors and temperatures, emphasizing the potential for maintaining high growth rates at lower temperatures when using Si3H8. Ti/Si1−xGex:P stacks reveal a promising reduction in contact resistivity with decreasing the Ge content, particularly when incorporating thin Si:P cap layers at the Ti/Si1−xGex:P interface. This comprehensive study highlights the potential of Si1−xGex:P as an alternative material for advanced GAA transistor technologies, offering improved mobility and meeting the thermal budget requirements