12 research outputs found

    Advanced Compact Thermal Modeling by using VHDL-AMS

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    This paper presents an improved methodology to generate Compact Thermal Models "CTMs" by using (VHDL-AMS) modeling language. This methodology makes it possible to have Boundary Conditions Independent "BCI" CTMs for multi chip components and systems while taking into account the nonlinear thermal conductivity of semiconductors and other materials.Comment: Submitted on behalf of TIMA Editions (http://irevues.inist.fr/tima-editions

    Transient compact modeling for multi chips components

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    In this paper, we present a methodology to generate transient 3D Nonlinear Compact Thermal Models (CTMs) for multi-chip electronic components and systems. This method is based on defining the Optimal Thermal Coupling Point (OTCP) that simplifies generating the CTMs. The CTMs are presented by RC network that enables us to make full and fast electro-thermal calculations in one simulation process by using PSpice or any electrical simulation software. This paper is a continuity for research work that aims at reducing the number of RC elements, indeed the proposed work differs from nodal method that induce significant number of RC elements, while remaining faithful to the physical phenomena to model

    Two-port network theory based thermal characterization of power module packages

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    For thermal analysis, power module packages can often be considered as plane multilayered systems for which it has been demonstrated that appropriate Fourier transforms associated with the two-port network theory permit to develop very efficient solutions of the static or the time dependent 3D heat flow equation. However, in practice, the thermal resistances of soldered or pasted interfaces are most often not well known. Most of these parameters are theoretically unpredictable, therefore it is of highest interest to develop an experimental procedure intended for an adequate characterization of the 3D thermal behaviour of the cooling substrates. A two-port network theoretical basis for experimental characterization of the thermal behaviour of multilayered substrates (96% Alumina, AU4G, IMS), which are classically used for power module packaging, is presented. In spite of some difficulties in setting perfectly the boundary conditions for temperature and heat fluxes, the experimental results demonstrate the validity of the characterization method, and the soughted parameters can be measured for wide ranges of spatial pulsation. Suggested improvements of the existing experimental set can give rise to an industrial measurement set intended for thermal characterization of power module packages

    Distributed electrothermal modeling methodology for MOS gated power devices simulations

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    Currently electro-thermal simulations performed with 3D FEM simulators like ANSYS or COMSOL Multiphysics are limited to an imposed current flow through resistive materials. However, in the case of power MOS gated transistors like VDMOS transistors or IGBT, the channel resistance evolves with the gate voltage. This phenomenon is usually neglected in ON-state applications but seems to be determinant in switching application. Furthermore all the MOS cells of the transistors are not at the same temperature. This paper deals with a methodology that could allow taking into account the impact of the gate control and the MOS cells current distribution during 3D FEM electro-thermal simulations

    Computational Electronics

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