33 research outputs found

    Beyond Gbps Turbo Decoder on Multi-Core CPUs

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    International audienceThis paper presents a high-throughput implementation of a portable software turbo decoder. The code is optimized for traditional multi-core CPUs (like x86) and it is based on the Enhanced max-log-MAP turbo decoding variant. The code follows the LTE-Advanced specification. The key of the high performance comes from an inter-frame SIMD strategy combined with a fixed-point representation. Our results show that proposed multi-core CPU implementation of turbo-decoders is a challenging alternative to GPU implementation in terms of throughput and energy efficiency. On a high-end processor, our software turbo-decoder exceeds 1 Gbps information throughput for all rate-1/3 LTE codes with K < 4096

    Parallelization of a new embedded application for automatic meteor detection

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    This article presents the methods used to parallelize a new computer vision application. The system is able to automatically detect meteor from non-stabilized cameras and noisy video sequences. The application is designed to be embedded in weather balloons or for airborne observation campaigns. Thus, the final target is a low power system-on-chip (< 10 Watts) while the software needs to compute a stream of frames in real-time (> 25 frames per second). For this, first the application is split in a tasks graph, then different parallelization techniques are applied. Experiment results demonstrate the efficiency of the parallelization methods. For instance, on the Raspberry Pi 4 and on a HD video sequence, the processing chain reaches 42 frames per second while it only consumes 6 Watts.Comment: in French language, COMPAS 2023 - Conf{\'e}rence francophone d'informatique en Parall{\'e}lisme, Architecture et Syst{\`e}me, Jul 2023, Annecy (France), Franc

    MIPP: a Portable C++ SIMD Wrapper and its use for Error Correction Coding in 5G Standard

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    International audienceError correction code (ECC) processing has so far been performed on dedicated hardware for previous generations of mobile communication standards, to meet latency and bandwidth constraints. As the 5G mobile standard, and its associated channel coding algorithms , are now being specified, modern CPUs are progressing to the point where software channel decoders can viably be contemplated. A key aspect in reaching this transition point is to get the most of CPUs SIMD units on the decoding algorithms being pondered for 5G mobile standards. The nature and diversity of such algorithms requires highly versatile programming tools. This paper demonstrates the virtues and versatility of our MIPP SIMD wrapper in implementing a high performance portfolio of key ECC decoding algorithms

    Toward High-Performance Implementation of 5G SCMA Algorithms

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    International audienceThe recent evolution of mobile communication systems toward a 5G network is associated with the search for new types of non-orthogonal modulations such as Sparse Code Multiple Access (SCMA). Such modulations are proposed in response to demands for increasing the number of connected users. SCMA is a non-orthogonal multiple access technique that offers improved Bit Error Rate (BER) performance and higher spectral efficiency than other comparable techniques, but these improvements come at the cost of complex decoders. There are many challenges in designing near-optimum high throughput SCMA decoders. This paper explores means to enhance the performance of SCMA decoders. To achieve this goal, various improvements to the MPA algorithms are proposed. They notably aim at adapting SCMA decoding to the Single Instruction Multiple Data (SIMD) paradigm. An approximate modeling of noise is performed to reduce the complexity of floating-point calculations. The effects of Forward Error Corrections (FEC) such as polar, turbo and LDPC codes, as well as different ways of accessing memory and improving power efficiency of modified MPAs are investigated. The results show that the throughput of a SCMA decoder can be increased by 3.1 to 21 times when compared to the original MPA on different computing platforms using the suggested improvements

    An Efficient, Portable and Generic Library for Successive Cancellation Decoding of Polar Codes

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    International audienceError Correction Code decoding algorithms for consumer products such as Internet of Things (IoT) devices are usually implemented as dedicated hardware circuits. As processors are becoming increasingly powerful and energy efficient, there is now a strong desire to perform this processing in software to reduce production costs and time to market. The recently introduced family of Successive Cancellation decoders for Polar codes has been shown in several research works to efficiently leverage the ubiquitous SIMD units in modern CPUs, while offering strong potentials for a wide range of optimizations. The P-EDGE environment introduced in this paper, combines a specialized skeleton generator and a building blocks library routines to provide a generic, extensible Polar code exploration workbench. It enables ECC code designers to easily experiments with combinations of existing and new optimizations , while delivering performance close to state-of-art decoders

    Energy Consumption Analysis of Software Polar Decoders on Low Power Processors

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    International audienceThis paper presents a new dynamic and fully generic implementation of a Successive Cancellation (SC) decoder (multi-precision support and intra-/inter-frame strategy support). This fully generic SC decoder is used to perform comparisons of the different configurations in terms of throughput, latency and energy consumption. A special emphasis is given on the energy consumption on low power embedded processors for software defined radio (SDR) systems. A N=4096 code length, rate 1/2 software SC decoder consumes only 14 nJ per bit on an ARM Cortex-A57 core, while achieving 65 Mbps. Some design guidelines are given in order to adapt the configuration to the application context

    Fast and Flexible Software Polar List Decoders

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    International audienceFlexibility is one mandatory aspect of channel coding in modern wireless communication systems. Among other things, the channel decoder has to support several code lengths and code rates. This need for flexibility applies to polar codes that are considered for control channels in the future 5G standard. This paper presents a new generic and flexible implementation of a software Successive Cancellation List (SCL) decoder. A large set of parameters can be fine-tuned dynamically without re-compiling the software source code: the code length, the code rate, the frozen bits set, the puncturing patterns, the cyclic redundancy check, the list size, the type of decoding algorithm, the tree-pruning strategy and the data quantization. This generic and flexible SCL decoder enables to explore tradeoffs between throughput, latency and decoding performance. Several optimizations are proposed to achieve a competitive decoding speed despite the constraints induced by the genericity and the flexibility. The resulting polar list decoder is about 4 times faster than a generic software decoder and only 2 times slower than a non-flexible unrolled decoder. Thanks to the flexibility of the decoder, the fully adaptive SCL algorithm can be easily implemented and achieves higher throughput than any other similar decoder in the literature (up to 425 Mb/s on a single processor core for N = 2048 and K = 1723 at 4.5 dB)

    Fast Simulation and Prototyping with AFF3CT

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    International audienceThis demonstration intends to present AFF3CT (A Fast Forward 3rror Correction Tool). The main objective of AFF3CT is to provide a portable, open source, fast and flexible software to the channel coding community in such a way that researchers can spend more time on channel coding / algorithmic problems instead of software development issues. It is also intended to facilitate the process of hardware verification and debug with the objective of fast prototyping. I. SIMULATION OF A DIGITAL COMMUNICATION CHAIN Despite the wide variety of existing communication systems , all of them are based on a common abstract model that was proposed by the genius founder of information theory, Claude Shannon [1]. Figure 1 shows the synoptic of such a communication chain. In this structure, the channel encoder and decoder determine the achievable error rate of the system. Moreover, the channel decoder is a large contributor in the overall computational complexity of the system. On the eve of the 5th generation of mobile communication systems, one of the challenges is to imagine systems able to transmit a huge amount of data in a very short amount of time at a very small energy cost in a wide variety of environments. In such a context, researchers work at refining some existing coding schemes (encoder + decoder) in such a way that the system has a low residual error rate and that the associated decoder is fast, flexible and has a low complexity. The validation of a new coding scheme requires the estimation of the error rate performance. Unfortunately, most of the time, no simple mathematical model exists to predict the performance of a channel encoder/decoder. The only simple solution is to perform a Monte Carlo simulation of the whole communication chain: some data are pseudo-randomly generated, encoded, modulated, noised, decoded and the performance is estimated by measuring the Bit Error Rate (BER) and the Frame Error Rate (FER) at the receiver side. This apparently simple setup leads to three main problems. Reproducibility: It is usually a tedious task to reproduce the results from the literature. This can be explained by the large amount of empirical parameters necessary to define one communication system and not all of them are reported in the publications. Moreover, it is rare that researchers actually share the source code of their simulator. As a consequence, a large amount of time is spent "reinventing the wheel" only to be able to compare to the state-of-the-art results

    AFF3CT : Un environnement de simulation pour le codage de canal

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    International audienceDans cet article nous présentons un environne-ment de simulation de Monte Carlo pour les systèmes de communications numériques. Nous nous focalisons en particulier sur les fonctions associées au codage de canal. Après avoir présenté les enjeux liés à la simulation , nous identifions trois problèmes inhérents à ce type de simulation. Puis nous présentons les princi-pales caractéristiques de l'environnement AFF3CT
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