Design Automation for Flow-based Microfluidic Biochips

Flow-based microfluidic biochips are presently designed, verified, and physically laid out manually. Software automation, similar to that employed for integrated circuits in the semiconductor industry, will raise productivity and reduce the cost of using biochips in scientific experiments

Design Automation for Flow-based Microfluidic Biochips

Flow-based microfluidic biochips are presently designed, verified, and physically laid out manually. Software automation, similar to that employed for integrated circuits in the semiconductor industry, will raise productivity and reduce the cost of using biochips in scientific experiments

Improved Synthesis of Compressor Trees on FPGAs by a Hybrid and Systematic Design Approach

Improving arithmetic circuits on FPGAs is one of the main imperatives of FPGA vendors. Augmenting logic cells with dedicated arithmetic components such as adders and carry chains indicates the need for such improvements. In a prior work, we showed how the carry chains in the state-of-the-art Altera FPGAs could be exploited for synthesis of compressor trees. In that work, we proposed generalized parallel counters (GPCs) as the building blocks and mapped them to logic cells of FPGA using LUTs and carry chains. In this paper, we propose a novel technique to increase the logic density of compressor tree synthesis by sharing the logic cells between two neighbor GPCs in a chain. Moreover, we expand the GPC library with bigger GPCs and we propose a systematic approach to select the right GPCs based on the synthesis optimization targets. Finally, we will demonstrate that our framework can be retargeted to Xilinx Virtex-5 FPGAs with minor modifications. 1