8 research outputs found

    ๋ฉ€ํ‹ฐํ˜• ์—ดํŽŒํ”„ ์‹œ์Šคํ…œ์˜ ๋ƒ‰๊ฐ ํŠน์„ฑ์— ๊ด€ํ•œ ์—ฐ๊ตฌ

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    ํ•™์œ„๋…ผ๋ฌธ(์„์‚ฌ) --์„œ์šธ๋Œ€ํ•™๊ต ๋Œ€ํ•™์› :๊ธฐ๊ณ„ํ•ญ๊ณต๊ณตํ•™๋ถ€,2007.Maste

    Software Design for Non-volatile Memory

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    DoctorNon-volatile memory, including phase-change memory (PCM), has several benefits including low cost, non-volatility, byte-addressability, etc., and limitations such as write endurance. There have been several hardware approaches to exploit the benefits while minimizing the negative impact of limitations. Software approaches could give further improvements, when used together with hardware approaches, by taking advantage of write behavior present in the program, e.g., write behavior on dynamically allocated data, which is hardly captured by hardware approaches. This work proposes a software design methodology to reduce costly PCM writes. First, on top of existing hardware approach such as Flip-N-Write, this work advocates exploiting the capability of PCM bit-level differential write in the software by judiciously reusing previously allocated memory resource. In order to avoid wear-out incurred by the reuse, this work presents software-based wear-leveling methods which distribute writes across PCM cells. In order to further reduce PCM writes, we propose identifying data whose loss does not affect the functionality of the underlying software, and then diverting write traffic for those data items to volatile memory. To evaluate the effectiveness of these methods, as a case study, we applied the proposed methods to the design of journaling in SQLite and Memcached. SQLite is an important database application commonly used in smartphones, and Memcached is a distributed key-value cache system widely used in server application to accelerate service time. For the experiments, we used an in-house PCM-based prototype board and PC. Experiments about SQLite with four representative mobile applications show that the proposed design methods, which is applied on top of the hardware approach, Flip-N-Write, result in 75.2% further reduction in total bit updates in PCM, on average, without aggravating wear out compared with the baseline of PCM-based journaling which is based only on the hardware approach. Also, the proposed design methods result in 58.3% reduction in energy consumption and 31.7% reduction in runtime compared to the baseline design of SQLite journaling on Flash memory. Experiments about Memcached with memtier and YCSB shows proposed design methods gives 14.5% processing time reduction compared to same-cost original Memcached implementation and 67.0% total bit update reduction compared to Memcached implementation that uses PCM only to store key-value items.์ƒ ๋ณ€ํ™” ๋ฉ”๋ชจ๋ฆฌ(phase-change memory)๋ฅผ ๋น„๋กฏํ•œ ๋น„ ํœ˜๋ฐœ์„ฑ ๋ฉ”๋ชจ๋ฆฌ ์†Œ์ž๋Š” ๊ธฐ์กด ๋ฉ”๋ชจ๋ฆฌ ์†Œ์ž๋“ค์ด ๊ฐ–์ง€ ๋ชปํ•œ ์žฅ์ ์„ ๊ฐ€์ง€๊ณ  ์žˆ๋‹ค. ์ฃผ ๊ธฐ์–ต์žฅ์น˜๋กœ ์ฃผ๋กœ ํ™œ์šฉ๋˜๋Š” DRAM์— ๋น„ํ•ด ๋น„์šฉ์ด ์‹ธ๊ณ  ๋น„ ํœ˜๋ฐœ์„ฑ์ด๋ฉฐ, ๋ณด์กฐ ๊ธฐ์–ต์žฅ์น˜๋กœ ์ฃผ๋กœ ํ™œ์šฉ๋˜๋Š” Flash memory์— ๋น„ํ•ด ๋น ๋ฅด๊ณ  ๋ฐ”์ดํŠธ ๋‹จ์œ„๋กœ ์ž…์ถœ๋ ฅ์„ ํ•  ์ˆ˜ ์žˆ๋‹ค. ๋ฐ˜๋ฉด, DRAM์— ๋น„ํ•ด ์“ฐ๊ธฐ ๋‚ด๊ตฌ์„ฑ์ด ๋‚˜์œ ๋‹จ์ ๋„ ๊ฐ€์ง€๊ณ  ์žˆ๋‹ค. ์ด๋Ÿฌํ•œ ์žฅ์ ์„ ์‹ญ๋ถ„ ๋ฐœํœ˜ํ•˜๋ฉด์„œ ๋‹จ์ ์„ ๊ฐ€๋ฆด ์ˆ˜ ์žˆ๋Š” ๋‹ค์–‘ํ•œ ํ•˜๋“œ์›จ์–ด์ ์ธ ์ ‘๊ทผ ๋ฐฉ๋ฒ•๋“ค์ด ์ œ์‹œ๋œ ๋ฐ” ์žˆ๋‹ค. ์ด์— ์†Œํ”„ํŠธ์›จ์–ด์ ์ธ ์ ‘๊ทผ ๋ฐฉ๋ฒ•์„ ๋”ํ•  ๊ฒฝ์šฐ ๋™์ ์œผ๋กœ ํ• ๋‹น๋˜๋Š” ๋ฉ”๋ชจ๋ฆฌ์— ๋Œ€ํ•œ ์“ฐ๊ธฐ ๋™์ž‘์„ ๋น„๋กฏํ•œ ํ•˜๋“œ์›จ์–ด์  ์ ‘๊ทผ ๋ฐฉ๋ฒ•์œผ๋กœ ์žก์•„๋‚ด๊ธฐ ํž˜๋“  ์—ฌ๋Ÿฌ ๊ฐ€์ง€ ์ถ”๊ฐ€์ ์ธ ์ •๋ณด๋ฅผ ํ™œ์šฉํ•˜์—ฌ ๋” ๋งŽ์€ ์„ฑ๋Šฅ ํ–ฅ์ƒ์„ ์ด๋Œ์–ด๋‚ผ ์ˆ˜ ์žˆ๋‹ค. ์ด ๋…ผ๋ฌธ์—์„œ๋Š” ๋น„์šฉ์ด ํฐ PCM ์“ฐ๊ธฐ๋ฅผ ์ค„์ž„์œผ๋กœ์จ ์„ฑ๋Šฅ ํ–ฅ์ƒ์„ ์ด๋Œ์–ด๋‚ด๋Š” ์†Œํ”„ํŠธ์›จ์–ด์ ์ธ ์ ‘๊ทผ ๋ฐฉ๋ฒ•์„ ์ œ์‹œํ•œ๋‹ค. ๋จผ์ €, ํ• ๋‹น๋๋˜ ๋ฉ”๋ชจ๋ฆฌ ์ž์›์„ ์žฌํ™œ์šฉํ•จ์œผ๋กœ์จ PCM์˜ ์ฐจ๋™ ์“ฐ๊ธฐ(differential write)๋ฅผ ์ด์šฉํ•ด PCM ์…€์— ๋Œ€ํ•œ ์“ฐ๊ธฐ ๋™์ž‘์„ ์ตœ์†Œํ™”ํ•œ๋‹ค. ๋˜ํ•œ ์žฆ์€ ์žฌ์‚ฌ์šฉ์œผ๋กœ ์ธํ•œ PCM ์…€์˜ ๋งˆ๋ชจ๋ฅผ ์ตœ์†Œํ™”ํ•˜๊ธฐ ์œ„ํ•ด ์†Œํ”„ํŠธ์›จ์–ด์ ์ธ ์‚ฌ์šฉ ํ‰ํƒ„ํ™”(wear-leveling) ๋ฐฉ๋ฒ•์„ ์ œ์‹œํ•œ๋‹ค. ์ถ”๊ฐ€์ ์œผ๋กœ PCM์— ๋Œ€ํ•œ ์“ฐ๊ธฐ ๋™์ž‘์„ ๋” ์ค„์ด๊ธฐ ์œ„ํ•ด, ๊ธฐ๋Šฅ์ ์œผ๋กœ ์˜ฌ๋ฐ”๋ฅด๊ฒŒ ๋™์ž‘ํ•˜๋Š”๋ฐ ํ•„์š”ํ•œ ์ตœ์†Œํ•œ์˜ ๋ฐ์ดํ„ฐ๋ฅผ ์ œ์™ธํ•œ ๋‚˜๋จธ์ง€๋ฅผ ๋ถ„๋ฅ˜ํ•˜๊ณ , ์“ฐ๊ธฐ ๋™์ž‘์— ๊ฐ•ํ•˜์ง€๋งŒ ํœ˜๋ฐœ์„ฑ์„ ์ง€๋‹Œ ํœ˜๋ฐœ์„ฑ ๋ฉ”๋ชจ๋ฆฌ์— ๋ณด๊ด€ํ•œ๋‹ค. ์ œ์‹œ๋œ ์†Œํ”„ํŠธ์›จ์–ด ์„ค๊ณ„ ๋ฐฉ๋ฒ•์˜ ํšจ๊ณผ๋ฅผ ์•Œ์•„๋ณด๊ธฐ ์œ„ํ•ด SQLite์™€ Memcached ์‘์šฉ ํ”„๋กœ๊ทธ๋žจ์— ์ ์šฉํ•˜์—ฌ ์„ฑ๋Šฅ์„ ์‹œํ—˜ํ•˜์˜€๋‹ค. SQLite๋Š” ์Šค๋งˆํŠธํฐ์„ ๋น„๋กฏํ•œ ์ž„๋ฒ ๋””๋“œ ์žฅ์น˜์—์„œ ๋„๋ฆฌ ์‚ฌ์šฉ๋˜๋Š” ์ค‘์š”ํ•œ ๋ฐ์ดํ„ฐ๋ฒ ์ด์Šค ํ”„๋กœ๊ทธ๋žจ์ด๋ฉฐ, Memcached๋Š” ์„œ๋ฒ„ ์‘์šฉ ํ”„๋กœ๊ทธ๋žจ์—์„œ ๋ฐ˜์‘์„ฑ์„ ๋†’์ด๊ธฐ ์œ„ํ•ด ๋„๋ฆฌ ์‚ฌ์šฉ๋˜๊ณ  ์žˆ๋Š” ๋ถ„์‚ฐํ˜• ํ‚ค-๊ฐ’ ์บ์‹œ ์‹œ์Šคํ…œ์ด๋‹ค. ์‹คํ—˜์„ ์œ„ํ•ด ์—ฐ๊ตฌ์‹ค์—์„œ ์ œ์ž‘ํ•œ PCM ํ”„๋กœํ† ํƒ€์ดํ•‘ ๋ณด๋“œ์™€ PC๋ฅผ ์‚ฌ์šฉํ•˜์˜€๋‹ค. SQLite๋ฅผ ์ด์šฉํ•œ ์‹คํ—˜์—์„œ๋Š”, 4๊ฐ€์ง€์˜ ๋ชจ๋ฐ”์ผ ์‘์šฉ ํ”„๋กœ๊ทธ๋žจ์„ ํ†ตํ•ด ์‹คํ—˜์„ ์ง„ํ–‰ํ•˜์˜€๋‹ค. Flip-N-Write๊ฐ€ ๊ตฌํ˜„๋œ PCM ์„ ์ด์šฉํ•˜์—ฌ ์ตœ๋Œ€ PCM ์…€ ๋งˆ๋ชจ๋„๋ฅผ ๋†’์ด์ง€ ์•Š๋Š” ์„ ์—์„œ ํ‰๊ท ์ ์œผ๋กœ 75.2%์˜ PCM ์…€ ์“ฐ๊ธฐ ๋™์ž‘์„ ์ค„์˜€๋‹ค. ๋˜ํ•œ, ์ œ์•ˆ๋œ ๋ฐฉ๋ฒ•์„ ์ด์šฉํ•˜๋ฉด ๊ธฐ์กด์˜ Flash memory๋ฅผ ์ด์šฉํ•œ SQLite ์ €๋„๋ง์— ๋น„ํ•ด 58.3%์˜ ์—๋„ˆ์ง€ ์†Œ๋ชจ๋Ÿ‰๊ณผ 31.6%์˜ ์‹คํ–‰ ์‹œ๊ฐ„ ๊ฐ์†Œ๋ฅผ ์–ป์—ˆ๋‹ค. Memcached๋ฅผ ์ด์šฉํ•œ ์‹คํ—˜์—์„œ๋Š”, memtier์™€ YCSB benchmark๋ฅผ ํ†ตํ•ด ์‹คํ—˜์„ ์ง„ํ–‰ํ•˜์˜€๋‹ค. ๋น„์Šทํ•œ ๋น„์šฉ์ด ๋“œ๋Š” DRAM์„ ์‚ฌ์šฉํ•˜๋Š” ๊ธฐ์กด์˜ Memcached์— ๋น„ํ•ด 14.5%์˜ ์ˆ˜ํ–‰ ์‹œ๊ฐ„ ๊ฐ์†Œ๋ฅผ ์–ป์—ˆ๊ณ , DRAM ๋Œ€์‹  PCM์„ ์‚ฌ์šฉํ•˜๋Š” ๊ธฐ์กด Memcached์— ๋น„ํ•ด 67.0%์˜ PCM ์…€ ์“ฐ๊ธฐ ๋™์ž‘์„ ๊ฐ์†Œ์‹œ์ผฐ๋‹ค

    A PRAM-aware Modification of Linux Operating System

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    System Model for CPU/GPU Architecture

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