606 research outputs found

    The mechanism of formation of microporous or skinned membranes produced by immersion precipitation

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    Cellulose acetate and polysulfone casting solutions were coagulated in water/solvent mixtures with differing solvent content. Precipitation in pure water yielded skinned membranes. Precipitation in water/solvent mixtures with solvent concentration exceeding a certain minimum value (which is different for different systems) resulted in microporous membranes. This phenomenon has been explained in terms of the model description for the formation of asymmetric membranes as adopted in our laboratory. In this model, the skin formation is related to gelation and the formation of the porous substructure to liquid—liquid phase separation.\ud \ud It is made plausible that the addition of solvent to the coagulation bath favours non-solvent inflow and hence liquid—liquid demixing in the precipitating film

    Architecture Specifications in CλaSH

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    This paper introduces CλaSH, a novel hardware specification environment, by discussing several non-trivial examples. CλaSH is based on the functional language Haskell, and exploits many of its powerful abstraction mechanisms such as higher order functions, polymorphism, lambda abstraction, pattern matching, type derivation. As a result, specifications in CλaSH are concise and semantically clear, and simulations can be directly executed within a Haskell evaluation environment. CλaSH generates synthesizable low-level VHDL code by applying several transformation rules to a functional specification of a digital circuit

    A mathematical approach towards hardware design

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    Today the hardware for embedded systems is often specified in VHDL. However, VHDL describes the system at a rather low level, which is cumbersome and may lead to design faults in large real life applications. There is a need of higher level abstraction mechanisms. In the embedded systems group of the University of Twente we are working on systematic and transformational methods to design hardware architectures, both multi core and single core. The main line in this approach is to start with a straightforward (often mathematical) specification of the problem. The next step is to find some adequate transformations on this specification, in particular to find specific optimizations, to be able to distribute the application over different cores. The result of these transformations is then translated into the functional programming language Haskell since Haskell is close to mathematics and such a translation often is straightforward. Besides, the Haskell code is executable, so one immediately has a simulation of the intended system. Next, the resulting Haskell specification is given to a compiler, called CëaSH (for CAES LAnguage for Synchronous Hardware) which translates the specification into VHDL. The resulting VHDL is synthesizable, so from there on standard VHDL-tooling can be used for synthesis. In this work we primarily focus on streaming applications: i.e. applications that can be modeled as data-flow graphs. At the moment the CëaSH system is ready in prototype form and in the presentation we will give several examples of how it can be used. In these examples it will be shown that the specification code is clear and concise. Furthermore, it is possible to use powerful abstraction mechanisms, such as polymorphism, higher order functions, pattern matching, lambda abstraction, partial application. These features allow a designer to describe circuits in a more natural and concise way than possible with the language elements found in the traditional hardware description languages. In addition we will give some examples of transformations that are possible in a mathematical specification, and which do not suffer from the problems encountered in, e.g., automatic parallelization of nested for-loops in C-programs

    Consistency of non-linear least-squares estimators

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    Hiding State in CλaSH Hardware Descriptions

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    Synchronous hardware can be modelled as a mapping from input and state to output and a new state, such mappings are referred to as transition functions. It is natural to use a functional language to implement transition functions. The CaSH compiler is capable of translating transition functions to VHDL. Modelling hardware using multiple components is convenient. Components in CaSH can be considered as instantiations of functions. To avoid packing and unpacking state when composing components, functions are lifted to arrows. By using arrows the chance of making errors will decrease as it is not required to manually (un)pack the state. Furthermore, the Haskell do-syntax for arrows increases the readability of hardware designs. This is demonstrated using a realistic example of a circuit which consists of multiple components

    Why are so many Dutch companies relocating abroad?

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    For much of the 20th century, most western multinationals had two somewhat separate identities: a vast multicultural, multi-country enterprise that stretched around the world, and a home office that tended to be very homogenous and even somewhat cosy, like the capital city of a sprawling empire

    Rules of Regularity: An Empirical Quest for Commercial Certainty in Arbitration

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    The U.S. Supreme Court justifies the broad enforceability of arbitration agreements with the notion that arbitration expands parties\u27 autonomy to contract for an efficient alternative to court proceedings. Unfortunately, the current practice of both domestic and cross-border commercial arbitration does not fully live up to these expectations. It is crucial to both autonomy and efficiency theories of contract law that adjudicatory decision-making is predictable so parties can tailor their contracts accordingly. However, commercial arbitration\u27s prevailing culture of confidentiality and lack of stare decisis diminishes commercial certainty. To bring the reality of commercial arbitration closer to the Supreme Court\u27s reasoning, this Article proposes a method of empirical legal research that helps uncover patterns of arbitral decision-making and articulate arbitration\u27s rules of regularity. It also offers a proof of concept by presenting an original quantitative text analysis of unpublished arbitral awards from the International Court of Arbitration, which focuses on the arbitral assessment of compensatory damages in breach-of-contract disputes. That study uncovers three substantive and procedural rules of regularity, which future transactors can accept or contract around when negotiating damages and arbitration clauses

    Using rewriting to synthesize functional languages to digital circuits

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    A straightforward synthesis from functional languages to digital circuits transforms variables to wires. The types of these variables determine the bit-width of the wires. Assigning a bit-width to polymorphic and function-type variables within this direct synthesis scheme is impossible. Using a term rewrite system, polymorphic and function-type binders can be completely eliminated from a circuit description, given only minor and reasonable restrictions on the input. The presented term rewrite system is used in the compiler for CλaSH: a polymorphic, higher-order, functional hardware description language
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