Hybrid Inductive-Capacitive Charge Pump with Improved Diode Driving Capability

filing date: 28.04.2003, pub. date: 07.10.2004, Issued: 25.04.200

Routing Procedure and System, Corresponding Network, such as a Network on Chip (NOC), and Computer Program Product therefor

filing date: 12.11.2004, pub. date: 18.5.2006, Issued: 16.12.200

Increasing the Immunity to Electromagnetic Interferences of CMOS OpAmps

This paper presents the successful design of a CMOS operational amplifier with enhanced immunity to electromagnetic interferences. Thanks to its strongly symmetrical topology, the amplifier exhibits an intrinsic robustness to interferences arising from a wide class of sources. Such a scheme, for the first time in the authors' knowledge, proves the effectiveness of symmetrical topologies to minimize the effects of electromagnetic interferences in operational amplifiers. The amplifier architecture is based on 2 identical stages: 2 fully differential source cross-coupled amplifiers with active loads. The circuit was fabricated in a 0.8 μm n-well CMOS technology (AMS CYE process). Experimental results, in terms of EMI immunity, are presented and compared with a commercial amplifier. They show a low susceptibility to EMI conveyed both to the input and the power pins. The EMI effects on the proposed amplifier are reduced by more than one order of magnitude, compared to a commercial amplifier. Furthermore the amplifier overall measured performances are provided along with the corresponding simulation results

EMI Effects in CMOS Time-Mode Circuits

This paper presents the effects of a noisy electromagnetic environment in the Time-Mode Signal Processing (TMSP). The basic building block of all the TMSP circuits is designed in a standard 180nm CMOS technology and it is exposed to the electromegnetic interferences (EMI), picked up from the I/O pins and the power supply rails. It is found that the TMSP circuits are suscpetible to the interferences which can cause timing jitter and non linearity