Porous Media Modeling of Microchannel Cooled Electronic Chips with Nonuniform Heating

<p>Microchannels are used for the cooling of electronic chips. However, the three-dimensional computational fluid dynamics modeling of the large number of channels in a full chip requires a huge number of meshes and computation time. Although porous media modeling of microchannels can significantly reduce the effort of simulation, most previous porous media models are based upon the assumption that the surface heat flux or temperature is uniform on the chip. In reality, the heat flux on the chip is usually highly nonuniform. In the present study, the porous media model considers the simultaneously developing entrance effect at the microchannel inlet and the thermally developing entrance effect due to the severe heat flux variation along the channel. Duhamel’s integral is used to provide the Nusselt number distribution corresponding to the nonuniform heat flux distribution along the channel. The computing cost of this modeling method is only about 1% of the three-dimensional conjugate simulation. This porous media thermal modeling method is applied to model two full-scale electronic chips with realistic power distributions on the surfaces, and temperature maps are generated. The porous media thermal modeling offered by this study is an accurate and efficient alternative for modeling the electronic chips cooled by microchannels.</p

hermal-Aware Microchannel Cooling of Multicore Processors: A Three-Stage Design Approach

<p>This study goes beyond the common microchannel cooling system composed of uniform parallel straight microchannels and proposed a three-stage design approach for spatially thermal-aware microchannel cooling of 2D multicore processors. By applying effective strategies and arranging key design parameters, stronger cooling is provided under the high power core area, and less cooling is provided under the low power cache area to effectively save the precious pumping power, lower the hot spot temperature and lower temperature gradients on chip. Two microchannel cooling systems are specifically designed for a 2 core 150 W Intel Tulsa processor and an 8 core 260 W (doubled power) Intel Nehalem processor with single phase HFE7100 as coolant. For the Tulsa processor, a strategy named strip-and-zone is used. The final design leads to 30 kPa pressure drop and 0.094 W pumping power while maintains the hot spot temperature to be 75 °C. For the Nehalem processor, a split flow microchannel system and a widen-inflow strategy are applied. A design is achieved to cost 15 kPa pressure drop and 0.0845 W pumping power while maintains the hot spot temperature to be 82.9°C. The design approach in this study provides the basic guide for the industrial applications of effective multicore processor cooling using microchannels.</p

Porous Media Modeling of Two-Phase Microchannel Cooling of Electronic Chips With Nonuniform Power Distribution

<p>Compared to single-phase heat transfer, two-phase microchannel heat sinks utilize latent heat to reduce the needed flow rate and to maintain a rather uniform temperature close to the boiling temperature. The challenge in the application of cooling for electronic chips is the necessity of modeling a large number of microchannels using large number of meshes and extensive computation time. In the present study, a modified porous media method modeling of two-phase flow in microchannels is performed. Compared with conjugate method, which considers individual channels and walls, it saves computation effort and provides a more convenient means to perform optimization of channel geometry. The porous media simulation is applied to a real chip. The channels of high heat load will have higher qualities, larger flow resistances, and lower flow rates. At a constant available pressure drop over the channels, the low heat load channels show much higher mass flow rates than needed. To avoid this flow maldistribution, the channel widths on a chip are adjusted to ensure that the exit qualities and mass flow rate of channels are more uniform. As a result, the total flow rate on the chip is drastically reduced, and the temperature gradient is also minimized. However, it only gives a relatively small reduction on the maximum surface temperature of chip.</p