In-situ Alloying with B4C as a Prospective Method of Strengthening Laser-Deposited CrFeNi Coatings

Настоящая работа посвящена исследованию влияния in-situ легирования карбидом бора наплавленных лазером CrFeNi покрытий. Микроструктура и фазовый состав синтезированных CrFeNi‒B4C покрытий были изучены с помощью сканирующей электронной микроскопии и рентгено структурного анализа, соответственно. Для изучения механических свойств проводили испытания на микротвердость, наноиндентирование и трибологию полученных образцов.The present work is concerned with the research of the in-situ alloying effect of laser-deposited CrFeNi coatings with boron carbide. The microstructure and phase composition of the synthesized CrFeNi‒B4C coatings were studied using SEM and X-ray diffraction analysis, respectively. The microhardness, nanoindentation and tribological tests were carried out to investigate the mechanical prop erties of the obtained samples.Работа выполнена в рамках государственных заданий Министерства науки и высшего образования Российской Федерации (тема «Аддитивность» № 121102900049-1 и тема «Лазер» № АААА-А19-119070490049-8).The work was carried out within the framework of state tasks of the Ministry of Science and Higher Education of the Russian Federation (topic “Ad ditivity” No. 121102900049-1 and topic “Laser” No. AAAA19-119070490049-8)

Laser Cladding and Additive Manufacturing Technologies Using High-Entropy, Ceramic and Multilayer Materials

Рассмотрено получение теплостойких покрытий и деталей из высокоэнтропийных сплавов лазерными наплавкой и выращиванием. Высокоскоростным селективным лазерным плавлением создаются сверхтвердые покрытия на основе карбида и нитрида бора. Предложена комбинированная постобработка изделий аддитивного производства с формированием многослойных тонкопленочных покрытий.The review considers the production of heat-resistant coatings and parts from high-entropy alloys by laser cladding and additive manufacturing. High-speed selective laser melting creates superhard coatings based on boron carbide and boron nitride. A combined post-processing of additive manufacturing products with the formation of multilayer thin-film coatings is proposed.Работа выполнена в рамках государственных заданий ИФМ УрО РАН по теме № АААА-А18-118020190116-6 и ИМАШ УрО РАН по теме № АААА-А18-118020790147-4 при поддержке гранта РФФИ № 20-48­660065 и Свердловской области в части постобработки деталей аддитивного производства с формированием тонкопленочного покрытия. Исследование также поддержано проектом № IRA-SME‑66316 «cladHEA+» по программе M‑ERA. NET, Call 2019‑II в части получения покрытий из высокоэнтропийных сплавов лазерной наплавкой.The work was carried out within the framework of the state tasks of the IFM of the Ural Branch of the Russian Academy of Sciences on the topic no. AAAA18–118020190116–6 and IMASH of the Ural Branch of the Russian Academy of Sciences on the topic no. AAAA18-118020790147-4 with the support of the RFBR grant no. 20-48-660065 and the Sverdlovsk region in terms of post-processing of additive manufacturing parts with the formation of thin-film coating. The research is also supported by the project No. IRA-SME‑66316 “cladHEA+” under the program M‑ERA. NET, Call 2019‑II in terms of obtaining coatings from high-entropy alloys by laser surfacing

SELF-TIMED LOOK UP TABLE FOR ULAs AND FPGAs

Context. Self-Timed Circuits, proposed by D. Muller on the rise of the digital era, continues to excite researchers’ minds. These circuits started with the task of improving performance by taking into account real delays. Then Self-Timed Circuits have moved into the field of green computing. At last, they are currently positioned mainly in the field of fault tolerance. There is much redundancy in Self-Timed Circuits. It is believed that Self-Timed Circuits approaches will be in demand in the nano-circuitry when a synchronous approach becomes impossible. Strictly Self-Timed Circuits check transition process completion for each gate’s output. For this, they use so-called D. Muller elements (C-elements, hysteresis flip-flops, G-flip-flops). Usually, Self-Timed Circuits are designed on Uncommitted Logic Array. Now an extensive base of Uncommitted Logic Array Self-Timed gates exists. It is believed that SelfTimed Circuits are not compatible with FPGA technology. However, attempts to create self-timed FPGAs do not stop. The article proposes a Self-Timed Lookup Table for the Self-Timed Uncommitted Logic Array and the Self-Timed FPGA, carried out either by constants or utilizing additional memory cells. Authors proposed 1,2 – Self-Timed Lookup Table and described simulation results.&#x0D; Objective. The work’s goal is the analysis and design of the Strictly Self-Timed universal logic element based on Uncommitted Logic Array cells and pass-transistors circuits.&#x0D; Methods. Analysis and synthesis of the Strictly Self-Timed circuits with Boolean algebra. Simulation of the proposed element in the CAD “ARC”, TRANAL program, system NI Multisim by National Instruments Electronics Workbench Group, and layout design by Microwind. The reliability theory and reliability calculations in PTC Mathcad.&#x0D; Results. Authors designed, analyzed, and proved the Self-Timed Lookup Table’s workability for the Uncommitted Logic Arrays and FPGAs. Layouts of the novel logic gates are ready for manufacturing.&#x0D; Conclusions. The conducted studies allow us to use proposed circuits in perspective digital devices.</jats:p