62 research outputs found

    Supersaturated state of diazepam injection following dilution with infusion fluid

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    BackgroundSignificant precipitation produced by the dilution of diazepam (DZP) injection with an infusion fluid is a great concern for the clinical practice. In this study, the precipitation behavior under different conditions was investigated.MethodFor the sample preparation, DZP injections (Horizon injection and Cercine injection) were diluted with various infusion fluids (Saline, 5% glucose infusion fluid and Soldem 3A) at designated dilution ratios ranging from 1× to 40× (5 mg/mL to 0.125 mg/mL). In addition, to measure the solubility of DZP in the samples, the saturated solutions of DZP were prepared. The DZP concentrations in the samples were measured by high-performance liquid chromatography (HPLC). This study also investigated the precipitate using various analytical methods: infrared microscopy, 1H-NMR, differential scanning calorimetry, and powder X-ray deflection.ResultsFirst, the compatibility of injection with infusion fluids was investigated. Significant precipitation occurred at dilution ratios ranging from 2× to 20×. No significant effects of formulations and infusion fluids on the compatibility were observed. The solubility of DZP was then further investigated. The concentration of DZP dissolved in the admixtures was higher than the solubility. This indicated that DZP existed in a supersaturated state in the infusion fluid admixtures. In the next phase of this study, the precipitate was investigated using various analytical methods. Results showed that the precipitate in infusion fluid admixtures was mostly composed of DZP, but also contained small amounts of the ingredients of DZP injection, such as benzoic acid and benzyl alcohol.ConclusionsThis study clarified details of the precipitation occurring after dilution of DZP injection with infusion fluids. It is worth noting that DZP in an infusion admixture existed in a supersaturated state. These findings offer important insight into the clinical practice of DZP injection

    Signature of hidden order and evidence for periodicity modification in URu<sub>2</sub>Si<sub>2</sub>

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    The detail of electronic structures near the Fermi level in URu2Si2 has been investigated employing state-of-art laser angle-resolved photoemission spectroscopy. The observation of a narrow dispersive band near the Fermi level in the ordered state as well as its absence in a Rh-substituted sample strongly suggest that the emergence of the narrow band is a clear signature of the hidden-order transition. The temperature dependence of the narrow band, which appears at the onset of the hidden-order transition, invokes the occurrence of periodicity modification in the ordered state, which is shown for the first time by any spectroscopic probe. We compare our data to other previous studies and discuss possible implications

    Embedded DRAM using c-axis-aligned crystalline In-Ga-Zn oxide FET with 1.8V-power-supply voltage

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    An embedded memory using c-axis aligned crystalline In-Ga-Zn oxide (CAAC-IGZO) FETs with an extremely low off-state current on the order of yoctoamperes (yA) (yocto- is a metric prefix denoting a factor of 10-24) is known as a potential next-generation memory [1][2]. A dynamic oxide semiconductor RAM (DOSRAM), where each memory cell is composed of one CAAC-IGZO FET and one capacitor, enables long data retention and long interval of refresh operations with an advantage of extremely low off-state current of the CAAC-IGZO FET. However, negative backgate voltage (Vbg) and word-line driving voltages of 0/3.3 V (VSSL/VDDH) had been required for an access transistor of the memory cell to satisfy high on-state current and low off-state current. This work shows that DOSRAM operates with 1.8 V-power supply voltage by using a novel driving method. Figure 1 shows Vg-Id performance of a CAAC-IGZO FET used as a cell transistor. The threshold voltage (Vth) of the CAAC-IGZO FET is controlled by changing a level of Vbg, whereas Vth of the Si FET is controlled by channel doping. Figure 2 shows a block diagram of a prototyped DOSRAM. The refresh rate in DOSRAM mainly depends on the leakage current of cell transistors. To reduce the refresh rate to once an hour, the off-state current of the cell transistors on a non-selected word line needs to be reduced to 200 zeptoamperes (zA) per FET (zepto- is a metric prefix denoting a factor of 10-21) or lower at 85C. The required Vbg is -7.0 V to achieve such an off-state current at Vg 0 V, for example. To obtain approx. 100 MHz-driving frequency, the required on-state current is at least several microamperes. The voltage level difference in the word line, VDDH VSSL, is a factor that determines the on-state current, and in this work is fixed to 3.3 V so that the combination of Vbg and the word line voltage is optimized. The application of negative voltage to the word line enables the leakage current of the cell transistor to be maintained low even when Vbg is increased. For example, whereas the existing driving method meets the above off-state current value with Vbg -7.0 V and the VSSL 0 V, the novel driving method meets the value with Vbg 0 V and VSSL -1.5 V. In the novel driving method, VDDH 1.8 V. There has been a report of a reduction in leakage current of a memory cell by application of negative voltage to a top gate in DRAM using Si CMOS [3]. In contrast to it, DOSRAM including CAAC-IGZO FETs with L 60 nm has a leakage current of 200 zA or lower, which is 7-digit lower than that of the DRAM using Si CMOS, and enables longer data retention. The evaluation results of the prototyped DOSRAM verify that a reduction in power-supply voltage from 3.3 V to 1.8 V is possible in terms of operation and data retention. This suggests a highly compatible and efficient configuration of an embedded DRAM and a logic circuit where signals can be transmitted with low VDD. References [1] S. H. Wu, et al., IEEE Symp. VLSI Tech., pp. 166-167, 2017. [2] T. Ishizu, et al., IEEE Symp. VLSI Cir., pp. 162-163, 2017. [3] F. Hamzaoglu et al., IEEE Journal of Solid-State Circuits, vol. 50, no. 1, pp. 150-157, Jan. 2015
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