Distinct Motifs in ATAD5 C-Terminal Domain Modulate PCNA Unloading Process

Proliferating cell nuclear antigen (PCNA) is a DNA clamp that functions in key roles for DNA replication and repair. After the completion of DNA synthesis, PCNA should be unloaded from DNA in a timely way. The ATAD5-RFC-Like Complex (ATAD5-RLC) unloads PCNA from DNA. However, the mechanism of the PCNA-unloading process remains unclear. In this study, we determined the minimal PCNA-unloading domain (ULD) of ATAD5. We identified several motifs in the ATAD5 ULD that are essential in the PCNA-unloading process. The C-terminus of ULD is required for the stable association of RFC2-5 for active RLC formation. The N-terminus of ULD participates in the opening of the PCNA ring. ATAD5-RLC was more robustly bound to open-liable PCNA compared to the wild type. These results suggest that distinct motifs of the ATAD5 ULD participate in each step of the PCNA-unloading process

Hyper-FET’s Phase-Transition-Materials Design Guidelines for Ultra-Low Power Applications at 3 nm Technology Node

In this work, a hybrid-phase transition field-effects-transistor (hyper-FET) integrated with phase-transition materials (PTM) and a multi-nanosheet FET (mNS-FET) at the 3 nm technology node were analyzed at the device and circuit level. Through this, a benchmark was performed for presenting device design guidelines and for using ultra-low-power applications. We present an optimization flow considering hyper-FET characteristics at the device and circuit level, and analyze hyper-FET performance according to the phase transition time (TT) and baseline-FET off-leakage current (IOFF) variations of the PTM. As a result of inverter ring oscillator (INV RO) circuit analysis, the optimized hyper-FET increases speed by +8.74% and reduces power consumption by −16.55%, with IOFF = 5 nA of baseline-FET and PTM TT = 50 ps compared to the conventional mNS-FET in the ultra-low-power region. As a result of SRAM circuit analysis, the read static noise margin is improved by 43.9%, and static power is reduced by 58.6% in the near-threshold voltage region when the PTM is connected to the pull-down transistor source terminal of 6T SRAM for high density. This is achieved at 41% read current penalty