29 research outputs found

    A Saturating-Integrator-Based Behavioral Model of Ring Oscillator Facilitating PLL Design

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    Robustness Evaluation of Restricted Boltzmann Machine against Memory and Logic Error

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    Physical-Weight-Based Measurement Methodology Suppressing Noise or Reducing Test Time for High-Resolution Low-Speed ADCs

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    Sub-Picosecond Resolution and High-Precision TDC for ADPLLs Using Charge Pump and SAR-ADC

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    High Resolution Mixed-Domain Delta-Sigma Time-to-Digital Converter Using Compensated Charge-Pump Integrator

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    A compact quick-start sub-mW pulse-width-controlled PLL with automated layout synthesis using a place-and-route tool

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