48 research outputs found
A Tandem Queue Model for Two-Server Resequencing System ∗
A two-server resequencing system has two heterogeneous servers and two buffers. One is an arrival buffer, which holds incoming jobs waiting for service. The other is a resequencing buffer, which resequences served jobs back to their arrival orders before departure. Such a system can be modeled as a two-stage tandem queue where the jobs are always kept in the arrival orders but the servers swap the positions upon any job departure. With the assumption of phase-type distributions for job interarrival and service time, the Markovian properties of the state transition is preserved in the model. The stationary probability distribution and the stationary conditions are obtained by the matrix-geometric solution approach. The performance is evaluated in five numerical experiments. The main conclusions are: a small resequencing buffer reduces the mean delay of the jobs significantly; the burstness of arrival traffic has positive influence on the mean delay; a heterogeneous system with more-balanced servers achieves better performance; and the slow server in a less-balanced system has negative effect which might eventually “starve ” the fast server under heavy traffic load
A Wideband Cryogenic Readout Amplifier with Temperature-Insensitive Gain for SNSPD
This paper presents a temperature-insensitive wideband cryogenic amplifier for superconducting nanowire single-photon detectors (SNSPD). With a proposed folded diode-connected transistor load to realize a good device-tracking feature, the theoretical derivations the simulations and test results prove that the amplifier-gain cell has a stable gain performance over a wide temperature range, solving the issues of a lack of the accurate cryogenic device models. The amplifier achieves a gain of 26 dB from 100 kHz to 1 GHz at 4.2 K, consuming only 1.8 mW from a 1.8 V supply. With a 0.13-μm SiGe BiCMOS process, the chip area is 0.5 mm²
Application research on large-scale battery energy storage system under Global Energy Interconnection framework
In the context of constructing Global Energy Interconnection (GEI), energy storage technology, as one of the important basic supporting technologies in power system, will play an important role in the energy configuration and optimization. Based on the most promising battery energy storage technology, this paper introduces the current status of the grid technology, the application of large-scale energy storage technology and the supporting role of battery energy storage for GEI. Based on several key technologies of large-scale battery energy storage system, preliminary analysis of the standard system construction of energy storage system is made, and the future prospect is put forward. Keywords: Global Energy Interconnection, Large-scale energy storage, Key technology, Standard syste
A 48 GHz Fundamental Frequency PLL with Quadrature Clock Generation for 60 GHz Transceiver
This paper presents a design of a 48 GHz CMOS phase-locked loop (PLL) for 60 GHz millimeter-wave (mmWave) communication systems. For the sliding intermediate frequency (sliding-IF) transceiver applications, a fundamental frequency PLL with quadrature clock generation scheme is proposed. Specifically, with an implicit capacitive-bridged shunt peaking network, a second order harmonic filtering technique is realized in the voltage control oscillator (VCO) to broaden the bandpass response, thereby avoiding the complex common-mode resonant tank calibration and improving the phase noise performance. A robust current mode logic (CML) static frequency divider topology is adopted to realize the prescaler and to generate the quadrature clock. With the capacitive-bridged shunt peaking load and robust biasing circuit, the static frequency divider locking range and high frequency performance is improved and its reliability is enhanced over the PVT corners. To improve the image suppression ratio of the transceiver, a quadrature clock phase calibration scheme is proposed and verified. Fabricated in a 65 nm CMOS process, the PLL occupies a core area of 800 μm × 950 μm. Over the frequency range of 45.2 to 52.6 GHz, the measured PLL in-band phase noise PLL is better than −90 dBc/Hz@100 KHz offset, and its jitter is less than 155 fs. Moreover, the reference spur is less than −60 dBc/Hz
A 60-GHz CMOS Broadband Receiver With Digital Calibration, 20-to-75-dB Gain, and 5-dB Noise Figure
Experimental study of burning rates of cardboard box fires near sea level and at high altitude
To study the difference of solid fuel fire characteristics at different altitudes, two series of fire experiments of cardboard boxes filled with shredded office paper were conducted separately in Lhasa (altitude: 3650 m; air pressure: 65 kPa) and Hefei (altitude: 24 m, air pressure: 100.8 kPa), using a specially designed igniter. The measured parameters in the experiments include mass loss and flame axis temperature. Fuel load quantity and configuration were varied in the experiments. The results of the study indicate a likelihood that an ignition will result in smoldering fire at the high altitude. There is also likelihood that incipient phase may occur before the onset of full flaming combustion regardless of the altitude. The fuel mass loss fraction of flaming fires was found to follow a simple form of correlation with time when normalized over the half fuel consumption time, which was found to be inversely proportional to four-third power of the ambient pressure