Driver or coincidence detector: Modal switch of a corticothalamic giant synapse controlled by spontaneous activity and short-term depression

Giant synapses between layer 5B (L5B) neurons of somatosensory (barrel) cortex and neurons of the posteromedial nucleus (POm) of thalamus reside in a key position of the cortico-thalamo-cortical (CTC) loop, yet their synaptic properties and contribution to CTC information processing remain poorly understood. Fluorescence-guided local stimulation of terminals were combined with postsynaptic whole-cell recordings in thalamus to study synaptic transmission at an identified giant synapse. We found large EPSCs mediated by Ca2+-permeable AMPA and NMDA receptors. A single presynaptic electrical stimulus evoked a train of postsynaptic action potentials, indicating that a single L5B input can effectively drive the thalamic neuron. Repetitive stimulation caused strong short-term depression (STD) with fast recovery. To examine how these synaptic properties affect information transfer, spontaneous and evoked activity of L5B neurons was recorded in vivo and played back to giant terminals in vitro. We found that suprathreshold synaptic transmission was suppressed because of spontaneous activity causing strong STD of the L5B-POm giant synapse. Thalamic neurons only spiked after intervals of presynaptic silence or when costimulating two giant terminals. Therefore, STD caused by spontaneous activity of L5B neurons can switch the synapse from a "driver mode" to a "coincidence mode." Mechanisms decreasing spontaneous activity in L5B neurons and inputs synchronized by a sensory stimulus may thus gate the cortico-thalamo-cortical loop. Copyrigh

Register spilling and live-range splitting for SSA-form programs

Register allocation decides which parts of a variable’s live range are held in registers and which in memory. The compiler inserts spill code to move the values of variables between registers and memory. Since fetching data from memory is much slower than reading directly from a register, careful spill code insertion is critical for the performance of the compiled program. In this paper, we present a spilling algorithm for programs in SSA form. Our algorithm generalizes the well-known furthest-first algorithm, which is known to work well on straight-line code, to control-flow graphs. We evaluate our technique by counting the executed spilling instructions in the CINT2000 benchmark on an x86 machine. The number of executed load (store) instructions was reduced by 54.5 % (61.5%) compared to a state-of-the-art linear scan allocator and reduced by 58.2 % (41.9%) compared to a standard graph-coloring allocator. The runtime of our algorithm is competitive with standard linear-scan allocators