Laser Anneal-Induced Effects on the NBTI Degradation of Advanced-Process 45nm high-k PMOS

This paper presents the effects imposed on the reliability of advanced-process CMOS devices, specifically the NBTI degradation, subsequent to the integration of laser annealing (LA) in the process flow of a 45nm HfO2/TiN gate stack PMOS device. The laser annealing temperatures were varied from 900°C to 1350°C. The effects imposed on the NBTI degradation of the device were comprehensively analyzed in which the shifts of the threshold voltage and drain current degradation were observed. The analysis was extended to the effects of the conventional RTA as opposed to the advanced laser annealing process. It was observed that the incorporation of laser annealing in the process flow of the device enhances the NBTI degradation rate of the device, in contrast to the integration of the conventional RTA. Laser annealing subsequent to spike-anneal is observed to improve the reliability performance of the transistor at high negative biases

NBTI degradation effect on advanced-process 45 nm high-k PMOSFETs with geometric and process.

Negative bias temperature instability (NBTI) has become an important reliability concern for nano-scaled complementary metal oxide (CMOS) devices. This paper presents the effect of NBTI for a 45 nmadvanced process high-k dielectric with metal gate PMOS transistor. The device had incorporated advanced-process flow steps such as stress engineering and laser annealing in order to achieve high on-state drain current drive performance. To explore NBTI effects on an advanced-process sub-micron device, the 45 nm high-k PMOS transistor was simulated extensively with a wide range of geometric and process variations. The device was simulated at varying thicknesses in the dielectric layer, oxide interfacial layer, metal gate and polysilicon layer. In order to observe the NBTI effect on process variation, the NBTI degradation of the 45 nm advanced-process PMOS is compared with a 45 nm PMOS device which does not employ process-induced stress and incorporates the conventional rapid thermal annealing (RTA) as compared to the laser annealing process which is integrated in the advanced-process device flow. The simulation results show increasing degradation trend in terms of the drain current and threshold voltage shift when the thicknesses of the dielectric layer, oxide layer as well as the metal gate are increased

Proceedings of International Technical Postgraduate Conference 2022

This conference proceedings contains articles on the various research ideas of the academic & research communities presented at the International Technical Postgraduate Conference 2022 (TECH POST 2022) that was held at Universiti Malaya, Kuala Lumpur, Malaysia on 24-25 September 2022. TECH POST 2022 was organized by the Faculty of Engineering, Universiti Malaya. The theme of the conference is “Embracing Innovative Engineering Technologies Towards a Sustainable Future”.  TECH POST 2022 conference is intended to foster the dissemination of state-of-the-art research from five main disciplines of Engineering: Electrical Engineering, Biomedical Engineering, Civil Engineering, Mechanical Engineering, and Chemical Engineering. The objectives of TECH POST 2022 are to bring together innovative researchers from all engineering disciplines to a common forum, promote R&D activities in Engineering, and promote the dissemination of scientific knowledge and research know-how between researchers, engineers, and students. Conference Title: International Technical Postgraduate Conference 2022Conference Acronym: TECH POST 2022Conference Date: 24-25 September 2022Conference Location: Faculty of Engineering, Universiti Malaya, Kuala Lumpur Malaysia (Hybrid Mode)Conference Organizers: Faculty of Engineering, Universiti Malaya, Kuala Lumpur, Malaysia