Robust sigma delta converters : and their application in low-power highly-digitized flexible receivers

In wireless communication industry, the convergence of stand-alone, single application transceiver IC’s into scalable, programmable and platform based transceiver ICs, has led to the possibility to create sophisticated mobile devices within a limited volume. These multi-standard (multi-mode), MIMO, SDR and cognitive radios, ask for more adaptability and flexibility on every abstraction level of the transceiver. The adaptability and flexibility of the receive paths require a digitized receiver architecture in which most of the adaptability and flexibility is shifted in the digital domain. This trend to ask for more adaptability and flexibility, but also more performance, higher efficiency and an increasing functionality per volume, has a major impact on the IP blocks such systems are built with. At the same time the increasing requirement for more digital processing in the same volume and for the same power has led to mainstream CMOS feature size scaling, leading to smaller, faster and more efficient transistors, optimized to increase processing efficiency per volume (smaller area, lower power consumption, faster digital processing). As wireless receivers is a comparably small market compared to digital processors, the receivers also have to be designed in a digitally optimized technology, as the processor and transceiver are on the same chip to reduce device volume. This asks for a generalized approach, which maps application requirements of complex systems (such as wireless receivers) on the advantages these digitally optimized technologies bring. First, the application trends are gathered in five quality indicators being: (algorithmic) accuracy, robustness, flexibility, efficiency, and emission, of which the last one is not further analyzed in this thesis. Secondly, using the quality indicators, it is identified that by introducing (or increasing) digitization at every abstraction level of a system, the advantages of modern digitally optimized technologies can be exploited. For a system on a chip, these abstraction levels are: system/application level, analog IP architecture level, circuit topology level and layout level. In this thesis, the quality indicators together with the digitization at different abstraction levels are applied to S¿ modulators. S¿ modulator performance properties are categorized into the proposed quality indicators. Next, it is identified what determines the accuracy, robustness, flexibility and efficiency of a S¿ modulator. Important modulator performance parameters, design parameter relations, and performance-cost relations are derived. Finally, several implementations are presented, which are designed using the found relations. At least one implementation example is shown for each level of digitization. At system level, a flexible (N)ZIF receiver architecture is digitized by shifting the ADC closer to the antenna, reducing the amount of analog signal conditioning required in front of the ADC, and shifting the re-configurability of such a receiver into the digital domain as much as possible. Being closer to the antenna, and because of the increased receiver flexibility, a high performance, multi-mode ADC is required. In this thesis, it is proven that such multi-mode ADCs can be made at low area and power consumption. At analog IP architecture level, a smarter S¿ modulator architecture is found, which combines the advantages of 1-bit and multi-bit modulators. The analog loop filter is partly digitized, and analog circuit blocks are replaced by a digital filter, leading to an area and power efficient design, which above all is very portable, and has the potential to become a good candidate for the ADC in multimode receivers. At circuit and layout level, analog circuits are designed in the same way as digital circuits are. Analog IP blocks are split up in analog unit cells, which are put in a library. For each analog unit cell, a p-cell layout view is created. Once such a library is available, different IP blocks can be created using the same unit cells and using the automatic routing tools normally used for digital circuits. The library of unit cells can be ported to a next technology very quickly, as the unit cells are very simple circuits, increasing portability of IP blocks made with these unit cells. In this thesis, several modulators are presented that are designed using this digital design methodology. A high clock frequency in the giga-hertz range is used to test technology speed. The presented modulators have a small area and low power consumption. A modulator is ported from a 65nm to a 45nm technology in one month without making changes to the unit cells, or IP architecture, proving that this design methodology leads to very portable designs. The generalized system property categorization in quality indicators, and the digitization at different levels of system design, is named the digital design methodology. In this thesis this methodology is successfully applied to S¿ modulators, leading to high quality, mixed-signal S¿ modulator IP, which is more accurate, more robust, more flexible and/or more efficient

Designing a Comprehensive Understanding of Digital Transformation and its Impact

Many researchers, managers, and companies are currently dealing with digital transformation. Yet, there exists a research gap on the exact meaning and scope of this transformation. In this paper, an in-depth literature study was performed and synthesized to inductively construct a conceptual framework that reconciles the distinct definitions and aspects of digital transformation. From the framework, we derived a novel and comprehensive definition of digital transformation which was validated against the literature and shown to be exhaustive. Furthermore, our definition explicitly explains why digital transformation is happening and accelerating. Researchers and practitioners can use the framework to position their work and to gain a better understanding of its wide scope and impacts. This work can be among the first steps towards a unified understanding of digital transformation

Electromechanical wavelength tuning of double-membrane photonic crystal cavities

We present a method for tuning the resonant wavelength of photonic crystal cavities (PCCs) around 1.55 um. Large tuning of the PCC mode is enabled by electromechanically controlling the separation between two parallel InGaAsP membranes. A fabrication method to avoid sticking between the membranes is discussed. Reversible red/blue shifting of the symmetric/anti-symmetric modes has been observed, which provides clear evidence of the electromechanical tuning, and a maximum shift of 10 nm with < 6 V applied bias has been obtained.Comment: 9 pages, 3 figure

An optimized ultrasound detector for photoacoustic breast tomography

Photoacoustic imaging has proven to be able to detect vascularization-driven optical absorption contrast associated with tumors. In order to detect breast tumors located a few centimeter deep in tissue, a sensitive ultrasound detector is of crucial importance for photoacoustic mammography. Further, because the expected photoacoustic frequency bandwidth (a few MHz to tens of kHz) is inversely proportional to the dimensions of light absorbing structures (0.5 to 10+ mm), proper choices of materials and their geometries, and proper considerations in design have to be made for optimal photoacoustic detectors. In this study, we design and evaluate a specialized ultrasound detector for photoacoustic mammography. Based on the required detector sensitivity and its frequency response, a selection of active material and matching layers and their geometries is made leading to a functional detector models. By iteration between simulation of detector performances, fabrication and experimental characterization of functional models an optimized implementation is made and evaluated. The experimental results of the designed first and second functional detectors matched with the simulations. In subsequent bare piezoelectric samples the effect of lateral resonances was addressed and their influence minimized by sub-dicing the samples. Consequently, using simulations, the final optimized detector could be designed, with a center frequency of 1 MHz and a -6 dB bandwidth of ~80%. The minimum detectable pressure was measured to be 0.5 Pa, which will facilitate deeper imaging compared to the currrent systems. The detector should be capable of detecting vascularized tumors with resolution of 1-2 mm. Further improvements by proper electrical grounding and shielding and implementation of this design into an arrayed detector will pave the way for clinical applications of photoacoustic mammography.Comment: Accepted for publication in Medical Physics (American Association of Physicists in Medicine