On the accuracy of spectrum-based fault localization

Spectrum-based fault localization shortens the test- diagnose-repair cycle by reducing the debugging effort. As a light-weight automated diagnosis technique it can easily be integrated with existing testing schemes. However, as no model of the system is taken into account, its diagnostic accuracy is inherently limited. Using the Siemens Set benchmark, we investigate this diagnostic accuracy as a function of several parameters (such as quality and quantity of the program spectra collected during the execution of the system), some of which directly relate to test design. Our results indicate that the superior performance of a particular similarity coefficient, used to analyze the program spectra, is largely independent of test design. Furthermore, near- optimal diagnostic accuracy (exonerating about 80% of the blocks of code on average) is already obtained for low-quality error observations and limited numbers of test cases. The influence of the number of test cases is of primary importance for continuous (embedded) processing applications, where only limited observation horizons can be maintained

Diagnosis of embedded software using program spectra

Automated diagnosis of errors detected during software testing can improve the efficiency of the debugging process, and can thus help to make software more reliable. In this paper we discuss the application of a specific automated debugging technique, namely software fault localization through the analysis of program spectra, in the area of embedded software in high-volume consumer electronics products. We discuss why the technique is particularly well suited for this application domain, and through experiments on an industrial test case we demonstrate that it can lead to highly accurate diagnoses of realistic errors

Modeling Multi-threaded Architectures in PAMELA for Real-time High Performance Applications

In this paper we presents a method to explore the design space of multi threaded architectures using PAMELA [3] modeling language. The domain of applications we consider is digital signal processing (DSP), where high performance is derived by exploiting both fine-grain and coarse-grain parallelism in the application. The modeling scheme takes an unified view of both fine-grain and coarse-grain parallelism in a given application to measure the performance of the architecture. The application-written using a high-level language-is compiled, and a trace generated for benchmark data in terms of the instruction set architecture of the processor. The generated trace is for a single uni-threaded, uni-processor system. This trace is pre-processed and re-targeted to generate multi-threaded architecture-specific PAMELA code. Using a material-oriented approach, the resulting PAMELA code is executed to evaluate various architecture options over the entire design space iteratively, subject to implementation constraints. We demonstrate the suitability and simplicity of the approach with an example