2 research outputs found
Rational Hydrogenation for Enhanced Mobility and High Reliability on ZnO-based Thin Film Transistors: From Simulation to Experiment
Hydrogenation is one of the effective
methods for improving the
performance of ZnO thin film transistors (TFTs), which originate from
the fact that hydrogen (H) acts as a defect passivator and a shallow <i>n</i>-type dopant in ZnO materials. However, passivation accompanied
by an excessive H doping of the channel region of a ZnO TFT is undesirable
because high carrier density leads to negative threshold voltages.
Herein, we report that Mg/H codoping could overcome the trade-off
between performance and reliability in the ZnO TFTs. The theoretical
calculation suggests that the incorporation of Mg in hydrogenated
ZnO decrease the formation energy of interstitial H and increase formation
energy of O-vacancy (<i>V</i><sub>O</sub>). The experimental
results demonstrate that the existence of the diluted Mg in hydrogenated
ZnO TFTs could be sufficient to boost up mobility from 10 to 32.2
cm<sup>2</sup>/(V s) at a low carrier density (∼2.0 ×
10<sup>18</sup> cm<sup>–3</sup>), which can be attributed to
the decreased electron effective mass by surface band bending. The
all results verified that the Mg/H codoping can significantly passivate
the <i>V</i><sub>O</sub> to improve device reliability and
enhance mobility. Thus, this finding clearly points the way to realize
high-performance metal oxide TFTs for low-cost, large-volume, flexible
electronics
Integrated One Diode–One Resistor Architecture in Nanopillar SiO<sub><i>x</i></sub> Resistive Switching Memory by Nanosphere Lithography
We
report on a highly
compact, one diode–one resistor (1D–1R)
nanopillar device architecture for SiO<sub><i>x</i></sub>-based ReRAM fabricated using nanosphere lithography (NSL). The intrinsic
SiO<sub><i>x</i></sub>-based resistive switching element
and Si diode are self-aligned on an epitaxial silicon wafer using
NSL and a deep-Si-etch process without conventional photolithography.
AC-pulse response in 50 ns regime, multibit operation, and good reliability
are demonstrated. The NSL process provides a fast and economical approach
to large-scale patterning of high-density 1D–1R ReRAM with
good potential for use in future applications