Automatic Curve Fitting Based on Radial Basis Functions and a Hierarchical Genetic Algorithm

Curve fitting is a very challenging problem that arises in a wide variety of scientific and engineering applications. Given a set of data points, possibly noisy, the goal is to build a compact representation of the curve that corresponds to the best estimate of the unknown underlying relationship between two variables. Despite the large number of methods available to tackle this problem, it remains challenging and elusive. In this paper, a new method to tackle such problem using strictly a linear combination of radial basis functions (RBFs) is proposed. To be more specific, we divide the parameter search space into linear and nonlinear parameter subspaces. We use a hierarchical genetic algorithm (HGA) to minimize a model selection criterion, which allows us to automatically and simultaneously determine the nonlinear parameters and then, by the least-squares method through Singular Value Decomposition method, to compute the linear parameters. The method is fully automatic and does not require subjective parameters, for example, smooth factor or centre locations, to perform the solution. In order to validate the efficacy of our approach, we perform an experimental study with several tests on benchmarks smooth functions. A comparative analysis with two successful methods based on RBF networks has been included

FPGA-Based Configurable Systolic Architecture for Window-Based Image Processing

Image processing requires more computational power and data throughput than most conventional processors can provide. Designing specific hardware can improve execution time and achieve better performance per unit of silicon area. A field-programmable-gate-array- (FPGA-) based configurable systolic architecture specially tailored for real-time window-based image operations is presented in this paper. The architecture is based on a 2D systolic array of configurable window processors. The architecture was implemented on an FPGA to execute algorithms with window sizes up to , but the design is scalable to cover larger window sizes if required. The architecture reaches a throughput of GOPs at a 60 MHz clock frequency and a processing time of milliseconds for generic window-based operators on gray-level images. The architecture compares favorably with other architectures in terms of performance and hardware utilization. Theoretical and experimental results are presented to demonstrate the architecture effectiveness.</p