An Approach Combining Simulation and Verification for SysML using SystemC and Uppaal

International audienceEnsuring the correction of heterogeneous and complex systems is an essential stage in the process of engineering systems.In this paper we propose a methodology to verify and validate complex systems specified with SysML language using a combination of the two techniques of simulation and verification. We translate SysML specifications into SystemC models to validate the designed systems by simulation, then we propose to verify the derived SystemC models by using the Uppaal model checker. A case study is presented to demonstrate the effectiveness of our approach

Using SysML for Smart Surface Modeling

Abstract—A smart surface is a distributed Micro-Electro-Mechanical System (MEMS) designed for conveying microscopic objects over a meso-scale distance, by the coordinated action of several microcells composed of microsensors, microactuators and control units. We present a high-level description of a smart surface with the System Modeling Language (SysML). We show how various SysML views (requirement, block, constraint and parametric diagrams) may accompany the design of such a complex system with precise but simple models. We also establish links between SysML and other technologies and tools for complex system modeling. Keywords-Smart Surface, SysML, Modeling I

An Approach based on SysML and SystemC to Simulate Complex Systems

International audienceThe complexity of heterogeneous systems has been increased during last years. One challenge of designing these systems is to deal with the application of methodologies based on Model Driven Architecture (MDA). MDA is a development framework that enables the description of systems by means of different models with transformations. This is an important area of research and consists on developing methodologies to reduce cost and time spent during their development. In our case, SysML, targets system descriptions in a high level of abstraction and provide diagrams for requirements. SystemC language is chosen as an alternative to the traditional languages and its simulation kernel is an important aspect which allows the designer to evaluate the system behaviours through simulations. This paper proposes a combined approach based on MDA concepts and rules to transform SysML semi-formal model to SystemC. The transformations are ensured by ATL language. A traffic light system is taken as a reference case study and used to illustrate our practical application. It is implemented on TopCased platform

A first attempt to combine SysML requirements diagrams and B

International audienceThis article describes a work-in-progress in the framework of a research project aiming at combining requirements engineering methods with formal methods. The main idea is to extend the SysML language with concepts of existing requirements engineering methods. In this article we present extensions to SysML with concepts from the goal model of the KAOS method and we give rules to derive a formal B specification from this goal model. The approach is then illustrated on a case study