1,825 research outputs found

    Spin Berry phase in anisotropic topological insulators

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    Three-dimensional topological insulators are characterized by the presence of protected gapless spin helical surface states. In realistic samples these surface states are extended from one surface to another, covering the entire sample. Generally, on a curved surface of a topological insulator an electron in a surface state acquires a spin Berry phase as an expression of the constraint that the effective surface spin must follow the tangential surface of real space geometry. Such a Berry phase adds up to pi when the electron encircles, e.g., once around a cylinder. Realistic topological insulators compounds are also often layered, i.e., are anisotropic. We demonstrate explicitly the existence of such a pi Berry phase in the presence and absence (due to crystal anisotropy) of cylindrical symmetry, that is, regardless of fulfilling the spin-to-surface locking condition. The robustness of the spin Berry phase pi against cylindrical symmetry breaking is confirmed numerically using a tight-binding model implementation of a topological insulator nanowire penetrated by a pi-flux tube.Comment: 9 pages, 4 figures (6 panels

    Weak topological insulator with protected gapless helical states

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    A workable model for describing dislocation lines introduced into a three-dimensional topological insulator is proposed. We show how fragile surface Dirac cones of a weak topological insulator evolve into protected gapless helical modes confined to the vicinity of dislocation line. It is demonstrated that surface Dirac cones of a topological insulator (either strong or weak) acquire a finite-size energy gap, when the surface is deformed into a cylinder penetrating the otherwise surface-less system. We show that when a dislocation with a non-trivial Burgers vector is introduced, the finite-size energy gap play the role of stabilizing the one-dimensional gapless states.Comment: 8 pages, 17 figure

    Quantization of Conductance Minimum and Index Theorem

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    We discuss the minimum value of the zero-bias differential conductance GminG_{\textrm{min}} in a junction consisting of a normal metal and a nodal superconductor preserving time-reversal symmetry. Using the quasiclassical Green function method, we show that GminG_{\textrm{min}} is quantized at (4e2/h)NZES (4e^2/h) N_{\mathrm{ZES}} in the limit of strong impurity scatterings in the normal metal. The integer NZESN_{\mathrm{ZES}} represents the number of perfect transmission channels through the junction. An analysis of the chiral symmetry of the Hamiltonian indicates that NZESN_{\mathrm{ZES}} corresponds to the Atiyah-Singer index in mathematics.Comment: 5 pages, 1 figur

    Scaling Rule for Very Shallow Trench IGBT toward CMOS Process Compatibility

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    2012 24th International Symposium on Power Semiconductor Devices and ICs (ISPSD 2012), June 3-7, 2012, Bruges, BelgiumDeep trench gate is used for latest IGBT to improve device performance. By large difference from deep submicron CMOS structure, there is no process compatibility among CMOS device and trench gate IGBT. We propose IGBT scaling rule for shrinking IGBT cell structure both horizontally and vertically. The scaling rule is theoretically delivered by structure based equations. Device performance improvement was also predicted by TCAD simulations even with very shallow trench gate. The rule enables to produce trench gate IGBT on large diameter wafer in CMOS factory with superior productivity

    IGBT Scaling Principle Toward CMOS Compatible Wafer Processes

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    A scaling principle for trench gate IGBT is proposed. CMOS technology on large diameter wafer enables to produce various digital circuits with higher performance and lower cost. The transistor cell structure becomes laterally smaller and smaller and vertically shallower and shallower. In contrast, latest IGBTs have rather deeper trench structure to obtain lower on-state voltage drop and turn-off loss. In the aspect of the process uniformity and wafer warpage, manufacturing such structure in the CMOS factory is difficult. In this paper, we show the scaling principle toward shallower structure and better performance. The principle is theoretically explained by our previously proposed “Structure Oriented” analytical model. The principle represents a possibility of technology direction and roadmap for future IGBT for improving the device performance consistent with lower cost and high volume productivity with CMOS compatible large diameter wafer technologies

    Effects of the phase coherence on the local density of states in superconducting proximity structures

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    We theoretically study the local density of states in superconducting proximity structure where two superconducting terminals are attached to a side surface of a normal-metal wire. Using the quasiclassical Green's function method, the energy spectrum is obtained for both of spin-singlet ss-wave and spin-triplet pp-wave junctions. In both of the cases, the decay length of the proximity effect at the zero temperature is limited by a depairing effect due to inelastic scatterings. In addition to the depairing effect, in pp-wave junctions, the decay length depends sensitively on the transparency at the junction interfaces, which is a unique property to odd-parity superconductors where the anomalous proximity effect occurs.Comment: 11 pages, 9 figure
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