An introduction to InP-based generic integration technology

Photonic integrated circuits (PICs) are considered as the way to make photonic systems or subsystems cheap and ubiquitous. PICs still are several orders of magnitude more expensive than their microelectronic counterparts, which has restricted their application to a few niche markets. Recently, a novel approach in photonic integration is emerging which will reduce the R&D and prototyping costs and the throughput time of PICs by more than an order of magnitude. It will bring the application of PICs that integrate complex and advanced photonic functionality on a single chip within reach for a large number of small and larger companies and initiate a breakthrough in the application of Photonic ICs. The paper explains the concept of generic photonic integration technology using the technology developed by the COBRA research institute of TU Eindhoven as an example, and it describes the current status and prospects of generic InP-based integration technology

An introduction to InP-based generic integration technology

Photonic integrated circuits (PICs) are considered as the way to make photonic systems or subsystems cheap and ubiquitous. PICs still are several orders of magnitude more expensive than their microelectronic counterparts, which has restricted their application to a few niche markets.Recently, a novel approach in photonic integration is emerging which will reduce the R&D and prototyping costs and the throughput time of PICs by more than an order of magnitude. It will bring the application of PICs that integrate complex and advanced photonic functionality on a single chip within reach for a large number of small and larger companies and initiate a breakthrough in the application of Photonic ICs. The paper explains the concept of generic photonic integration technology using the technology developed by the COBRA research institute of TU Eindhoven as an example, and it describes the current status and prospects of generic InP-based integration technology.Funding is acknowledged by the EU-projects ePIXnet, EuroPIC and PARADIGM and the Dutch projects NRC Photonics, MEMPHIS, IOP Photonic Devices and STW GTIP. Many others have contributed and the authors would like to thank other PARADIGM and EuroPIC partners for their help in discussions, particularly Michael Robertson (CIP).This is the final published version distributed under a Creative Commons Attribution License. It can also be viewed on the publisher's website at: http://iopscience.iop.org/0268-1242/29/8/08300

Archeologisch onderzoek Gemert-Bakel, Molenakker en Berglaren : inventariserend veldonderzoek - proefsleuven

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Optimizing the risk threshold of lymph node involvement for performing extended pelvic lymph node dissection in prostate cancer patients: a cost-effectiveness analysis

Background: Extended pelvic lymph node dissection (ePLND) may be omitted in prostate cancer (CaP) patients with a low predicted risk of lymph node involvement (LNI). The aim of the current study was to quantify the cost-effectiveness of using different risk thresholds for predicted LNI in CaP patients to inform decision making on omitting ePLND. Methods: Five different thresholds (2%, 5%, 10%, 20%, and 100%) used in practice for performing ePLND were compared using a decision analytic cohort model with the 100% threshold (i.e., no ePLND) as reference. Compared outcomes consisted of quality-adjusted life years (QALYs) and costs. Baseline characteristics for the hypothetical cohort were based on an actual Dutch patient cohort containing 925 patients who underwent ePLND with risks of LNI predicted by the Memorial Sloan Kettering Cancer Center web-calculator. The best strategy was selected based on the incremental cost effectiveness ratio when applying a willingness to pay (WTP) threshold of €20,000 per QALY gained. Probabilistic sensitivity analysis was performed with Monte Carlo simulation to assess the robustness of the results. Results: Costs and health outcomes were lowest (€4,858 and 6.04 QALYs) for the 100% threshold, and highest (€10,939 and 6.21 QALYs) for the 2% threshold, respectively. The incremental cost effectiveness ratio for the 2%, 5%, 10%, and 20% threshold compared with the first threshold above (i.e., 5%, 10%, 20%, and 100%) were €189,222/QALY, €130,689/QALY, €51,920/QALY, and €23,187/QALY respectively. Applying a WTP threshold of €20.000 the probabilities for the 2%, 5%, 10%, 20%, and 100% threshold strategies being cost-effective were 0.0%, 0.3%, 4.9%, 30.3%, and 64.5% respectively. Conclusion: Applying a WTP threshold of €20.000, completely omitting ePLND in CaP patients is cost-effective compared to other risk-based strategies. However, applying a 20% threshold for probable LNI to the Briganti 2012 nomogram or the Memorial Sloan Kettering Cancer Center web-calculator, may be a feasible alternative, in particular when higher WTP values are considered

InP-based generic foundry platform for photonic integrated circuits

The standardization of photonic integration processes for InP has led to versatile and easily accessible generic integration platforms. The generic integration platforms enable the realization of a broad range of applications and lead to a dramatic cost reduction in the development costs of photonic integrated circuits (PICs). This paper addresses the SMART Photonics generic integration platform developments. The integration technology based on butt joint active-passive epitaxy is shown to achieve a platform without compromising the performance of the different components. The individual components or building blocks are described. A process design kit is established with a comprehensive dataset of simulation and layout information for the building blocks. Latest results on process development and optimization are demonstrated. A big step forward is achieved by applying high-resolution ArF lithography, which leads to increased performance for AWGs and a large increase in reproducibility and yield. The generic nature of the platform is demonstrated by analyzing a number of commercial multiproject wafer runs. It is clear that a large variety of applications is addressed with more than 200 designs from industry as well as academia. A number of examples of PICs are displayed to support this. Finally, the design flow is explained, with focus on layout-aware schematic-driven design flow that is required for complex circuits. It can be concluded that generic integration on InP is maturing fast and with the current developments and infrastructure it is the technology of choice for low cost, densely integrated PICs, ready for high-volume manufacturing