Luminescence quenching studies of [Ru(dMeObpy)3]2+ complex using the quinone derivative-effect of micelles

Quinones are considered a class of organic compounds having a quinonoid group and are the ultimate electron acceptors. Due to this property, they have favourable redox potential and the ability to form stable hydrogen bonds. Luminescence quenching is one of the most important techniques used to get information regarding the structure and dynamics of a luminophore. A variety of transition metal complexes have been synthesized and studied to comprehend the quinones' electron-accepting characteristics. Among these, Ru(II) polypyridyl complexes have widespread applications in electron transfer reactions due to their well-defined photophysical and photochemical stability. The reaction of excited state Tris(4,4'-dimethoxy-2,2'-bipyridine)ruthenium(II)tetrafluoroborate [Ru(dMeObpy)3](BF4)2 complex with quinones was investigated through photoinduced electron transfer reaction in homogeneous and microheterogenous medium. The luminescence quenching technique has been used to study this reaction. The complex has an absorbance maximum of 448 nm in aqueous medium. The quenching rate constants were deduced using the Stern-Volmer equation. The interaction between the complex and the quinones in a cationic micellar medium, cetyltrimethylammonium bromide (CTAB), was analyzed based on electrostatic interaction and hydrophobicity. The plot between RTlnkq vs. reduction potential of the quinones, as well as the transient absorption spectra, confirmed the oxidative nature of quenching of the ruthenium complex in the presence of quinones. The quenching constant values are influenced by many factors, such as the nature of the ligand, medium, size, and structure of quenchers, and electron transfer distance between the donor and the acceptor. The formation of Ru3+ species is confirmed by its characteristic absorption at 600 nm

Embedding Security into Ferroelectric FET Array via In-Situ Memory Operation

Non-volatile memories (NVMs) have the potential to reshape next-generation memory systems because of their promising properties of near-zero leakage power consumption, high density and non-volatility. However, NVMs also face critical security threats that exploit the non-volatile property. Compared to volatile memory, the capability of retaining data even after power down makes NVM more vulnerable. Existing solutions to address the security issues of NVMs are mainly based on Advanced Encryption Standard (AES), which incurs significant performance and power overhead. In this paper, we propose a lightweight memory encryption/decryption scheme by exploiting in-situ memory operations with negligible overhead. To validate the feasibility of the encryption/decryption scheme, device-level and array-level experiments are performed using ferroelectric field effect transistor (FeFET) as an example NVM without loss of generality. Besides, a comprehensive evaluation is performed on a 128x128 FeFET AND-type memory array in terms of area, latency, power and throughput. Compared with the AES-based scheme, our scheme shows around 22.6x/14.1x increase in encryption/decryption throughput with negligible power penalty. Furthermore, we evaluate the performance of our scheme over the AES-based scheme when deploying different neural network workloads. Our scheme yields significant latency reduction by 90% on average for encryption and decryption processes

ALL-MASK: A Reconfigurable Logic Locking Method for Multicore Architecture with Sequential-Instruction-Oriented Key

Intellectual property (IP) piracy has become a non-negligible problem as the integrated circuit (IC) production supply chain is becoming increasingly globalized and separated that enables attacks by potentially untrusted attackers. Logic locking is a widely adopted method to lock the circuit module with a key and prevent hackers from cracking it. The key is the critical aspect of logic locking, but the existing works have overlooked three possible challenges of the key: safety of key storage, easy key-attempt from interface and key-related overheads, bringing the further challenges of low error rate and small state space. In this work, the key is dynamically generated by utilizing the huge space of a CPU core, and the unlocking is performed implicitly through the interconnection inside the chip. A novel low-cost logic reconfigurable gate is together proposed with ferroelectric FET (FeFET) to mitigate the reverse engineering and removal attack. Compared to the common logic locking methods, our proposed approach is 19,945 times more time consuming to traverse all the possible combinations in only 9-bit-key condition. Furthermore, our technique let key length increases this complexity exponentially and ensure the logic obfuscation effect.Comment: 15 pages, 17 figure

FAST: A Fully-Concurrent Access Technique to All SRAM Rows for Enhanced Speed and Energy Efficiency in Data-Intensive Applications

Compute-in-memory (CiM) is a promising approach to improving the computing speed and energy efficiency in dataintensive applications. Beyond existing CiM techniques of bitwise logic-in-memory operations and dot product operations, this paper extends the CiM paradigm with FAST, a new shift-based inmemory computation technique to handle high-concurrency operations on multiple rows in an SRAM. Such high-concurrency operations are widely seen in both conventional applications (e.g. the table update in a database), and emerging applications (e.g. the parallel weight update in neural network accelerators), in which low latency and low energy consumption are critical. The proposed shift-based CiM architecture is enabled by integrating the shifter function into each SRAM cell, and by creating a datapath that exploits the high-parallelism of shifting operations in multiple rows in the array. A 128-row 16-column shiftable SRAM in 65nm CMOS is designed to evaluate the proposed architecture. Postlayout SPICE simulations show average improvements of 4.4x energy efficiency and 96.0x speed over a conventional fully-digital memory-computing-separated scheme, when performing the 8-bit weight update task in a VGG-7 framework.Comment: 5 page

Generation of an induced pluripotent stem cell line that mimics the disease phenotypes from a patient with Fanconi anemia by conditional complementation

Generation of Fanconi anemia (FA) patient-specific induced pluripotent stem cells (iPSCs) has been reported to be technically challenging due to the defects in the FA-pathway in the patients' somatic cells. By inducible complementation of FA-pathway, we successfully reprogrammed the fibroblasts of an FA patient to iPSCs. CSCR19i-indCFANCA, one of the iPSC lines generated by the inducible complementation of FA-pathway, was extensively characterized for its pluripotency and karyotype. In the absence of doxycycline (DOX) and FANCA expression, this line showed the cellular phenotypes of FA, suggesting it is an excellent tool for FA disease modeling and drug screening