Fluorine passivation of defects and interfaces in crystalline silicon

Defects and impurities in silicon limit carrier lifetimes and the performance of solar cells. This work explores the use of fluorine to passivate defects in silicon for solar cell applications. We present a simple method to incorporate fluorine atoms into the silicon bulk and interfaces by annealing samples coated with thin thermally evaporated fluoride overlayers. It is found that fluorine incorporation does not only improve interfaces but can also passivate bulk defects in silicon. The effect of fluorination is observed to be comparable to hydrogenation, in passivating grain boundaries in multicrystalline silicon, improving the surface passivation quality of phosphorus-doped poly-Si-based passivating contact structures, and recovering boron−oxygen-related light-induced degradation in borondoped Czochralski-grown silicon. Our results highlight the possibility to passivate defects in silicon without using hydrogen and to combine fluorination and hydrogenation to further improve the overall passivation effect, providing new opportunities to improve solar cell performance

A passivating contact concept compatible with a short thermal treatment

In this study we present a boron-doped silicon carbide layers as a hole-selective contact which is compatible with short annealing time (typically < 1 minute) as the one used for firing of metal pastes. The application of such layers on symmetrically processed test structures lead to implied open circuit voltages up to 715 mV and contact resistances below 75 m Omega.cm(2). Proof-of-concept p-type solar cells employing such passivating contact stack over the full-rear side and a POCl3 diffused emitter metallized with firing-through of Ag-paste were processed, leading to a first conversion efficiency of 21.4%

Crystalline Silicon Solar Cells With Coannealed Electron- and Hole-Selective SiCx Passivating Contacts

We present electron- and hole-selective passivating contacts based on wet-chemically grown interfacial SiOx and overlying in-situ doped silicon carbide (SiCx) deposited by plasma-enhanced chemical vapor deposition. After annealing at 850 degrees C, excellent surface passivation on the p-type planar crystalline silicon wafer is obtained for both electron- and hole-selective contacts. Their potential is demonstrated at the device level by employing a simple process flow, in which the junction formation of the two polarities is achieved with a single coannealing step. Both-side-contacted patterning-free planar p-type cells with an area of 4 cm(2) and screen-printed metallization reach a fill factor of 83.4% and a open-circuit voltage of 726 mV. Zirconium-doped indium oxide with excellent optoelectrical properties is used as a front electrode. The decrease in the parasitic absorption in the front electrode results in higher photogenerated current. By realizing front-side-textured and rear-side-planar p-type cells, an efficiency of up to 22.6% is achieved

Phosphorous-Doped Silicon Carbide as Front-Side Full-Area Passivating Contact for Double-Side Contacted c-Si Solar Cells

We present an electron selective passivating contact based on a tunneling SiOx capped with a phosphorous doped siliconcarbideandpreparedwithahigh-temperaturethermalanneal. We investigate in detail the effects of the preparation conditions of theSiCx(n)(i.e.,gasflowprecursorandannealingtemperature)on the interface recombination rate, dopant in-diffusion, and optical properties using test structures and solar cells. On test structures, our investigation reveals that the samples annealed at temperatures of 800–850 °C exhibit an increased surface passivation toward higher gas flow ratio (r = CH4/(SiH4 + CH4)). On textured and planar samples, we obtained best implied open-circuit voltages (i-VOC) of 737 and 746 mV, respectively, with corresponding dark saturation current densities (J0) of∼8 and∼4 fA/cm2. The SiCx(n)layerswithdifferentrvalueswereappliedonthetextured front side of p-type c-Si solar cells in combination with a borondoped SiCx(p) as rear hole selective passivating contact. Our cell results show a tradeoff between VOC and short-circuit current density (JSC) dictated by the C-content in the front-side SiCx(n). On p-type wafers, best VOC = 706 mV, FF = 80.2%, and JSC = 38.0 mA/cm2 with a final conversion efficiency of 21.5% are demonstrated for 2 × 2 cm 2 screen-printed cells, with a simple and patterning-free process based on plasma depositions and one annealing step 800 °C < T < 850 °C for the formation of both passivating contacts

Interplay of annealing temperature and doping in hole selective rear contacts based on silicon-rich silicon-carbide thin films

We present a detailed optimization of a hole selective rear contact for p-type crystalline silicon solar cells which relies on full-area processes and provides full-area passivation. The passivating hole-contact is based on a layer stack comprising a chemically grown thin silicon oxide, an intrinsic silicon interlayer, and an in-situ boron doped non-stoichiometric silicon-rich silicon-carbide layer on top. After deposition, the structure is annealed at 775-900 degrees C to diffuse dopant impurities to the c-Si wafer and a hydrogenation step is carried out. It is shown that hydrogenation is essential to obtain high quality surface passivation. In particular, we compare the effect of annealing in forming gas and annealing with a silicon-nitride overlayer as hydrogen source. We present a systematic optimization of the hole-selective contact, for which we varied the doping concentration, annealing parameters and report the implied open circuit voltage (iV(oc)) and combined specific contact resistivity (p(c)). It is observed that for highly doped layers the optimum annealing temperature for high quality surface passivation is 800 degrees C while for lowly doped layers the optimum annealing condition shifts to 850 degrees C. Excellent surface passivation and efficient current transport is evidenced by an iV(oc) value of 718 mV which corresponds to a saturation current density (J(0)) of 11.5 fA/cm(2) and a p(c) of 17 mg Omega cm(2) on p-type wafers. Moreover, the evolution of the boron diffusion profiles with different annealing conditions is investigated. Finally, we demonstrate proof-of concept p-type hybrid solar cells employing the full-area hole-selective rear contact presented here and standard heterojunction front electron contact. The excellent efficiency potential of our passivating rear contact is highlighted by conversion efficiencies up to of 21.9%, enabling V-oc of 708 mV, FF of 79.9% and J(sc) of 38.7 mA/cm(2)

Passivating electron contact based on highly crystalline nanostructured silicon oxide layers for silicon solar cells

We present a novel passivating contact structure based on a nanostructured silicon-based layer. Traditional poly-Si junctions feature excellent junction characteristics but their optical absorption induces current losses when applied to the solar cell front side. Targeting enhanced transparency, the poly-Si layer is replaced with a mixed-phase silicon oxide/silicon layer. This mixed-phase layer consists of an amorphous SiOx matrix with incorporated Si filaments connecting one side of the layer to the other, and is referred to as nanocrystalline silicon oxide (nc-SiOx) layer. We investigate passivation quality, measured as saturation current density, and nanostructural changes, characterized by Raman spectroscopy and transmission electron microscopy, carefully studying the influence of annealing dwell temperature. Excellent surface passivation on n-type and also p-type wafers is shown. An optimum annealing temperature of 950 °C is found, resulting in a saturation current density of 8.8 fA cm2 and 11.0 fA cm2 for n-type and p-type wafers, respectively. Even before forming gas annealing, emitter saturation current densities of 27.9 fA cm2 (n+/n junction) and 32.0 fA cm2 (n+/p junction) are reached. Efficient current extraction is presented with specific contact resistivities of 86 mΩ cm2 on n-type wafer and 19 mΩ cm2 on p-type wafers, respectively. High-resolution transmission electron microscopy reveals that the layer stack consists of intermixed SiOx and Si phases with the Si phases being partly crystalline already in the as-deposited state. Thermal annealing at temperatures > 850 °C further promotes crystallization of the Si-rich regions. The addition of the SiOx phase enhances the thermal stability of the contact and should allow to tune the refractive index and improve transparency, while still providing efficient electrical transport through the crystalline Si phase, which extends throughout almost the entire contact

A Mixed-Phase SiOx Hole Selective Junction Compatible With High Temperatures Used in Industrial Solar Cell Manufacturing

We present a p-type passivating rear contact that complies with integration into standard solar cell manufacturing with phosphorus-diffused front side. Our contact structure consists of a thin SiOx tunneling layer grown by wet chemistry and a stack of layers deposited in one single run by plasma-enhanced chemical vapor deposition. The layers of the stack were tailored to protect the interfacial oxide layer, to act as a source for boron diffusion into the wafer and to connect to the external metallisation with low contact resistivity. We found that this stack tolerated annealing at 900 degrees C over a wide range of dwell times: for 15 min anneals we obtained dark saturation current densities (J(o)) as low as 10 fA center dot cm(-2) (after hydrogenation) and after 12-fold increase of the annealing time to 180 min, J(0) was only increased to 12 fA center dot cm(-2). These values corresponded to implied open circuit voltages (iV(oc)) of 718 and 715 mV, respectively. To test passivating rear contacts under realistic operation conditions, we combined them with an n-type heterojunction into hybrid solar cells. With conversion efficiencies abovementioned 22% and V-oc > 705 mV, these devices demonstrated high level of rear surface passivation. Finally, we demonstrated the integration of the hole selective rear contact with a POCl3 diffusion process. To this end, we added a phosphorus diffusion barrier to our layer stack by depositing one additional layer of amorphous SiOx on top of the stack. For symmetric samples with this layer structure on both sides, we observed iV(oc) values of 714 and 712 mV on n- and p-type silicon wafers after hydrogenation, respectively. Co-diffused cells with POCl3 front diffused emitter and rear passivating contact resulted so far in efficiencies of 20.4% and 20.1% for n- and p-type wafers, respectively