Safety and security aware framework for the development of feedback control systems

The need to address safety and security related aspects at an early stage of development of feedback control systems (FCS) has been identified as vital for the optimisation of the development process of military land systems. These systems often include network enabled capability (NEC) allowing the use of electronics architectures to integrate different sub-systems. However, this increased integration capability is associated with magnified safety risks and compromise from cyber attacks [4]. This paper discusses how the process of developing FCS for military land systems could benefit from the use of a framework that addresses safety and security issues at the system modelling level. The core part of the suggested framework consists of a Simulink model to be used by design engineers as a blueprint for the development of a modular FCS that are expected to feature a modular architecture with dedicated sub-modules for the processing of data related to safety and security aspects. Since the FCS developed through the use of framework features a modular architecture, the anticipated cost incurred in the design of the associated modular safety case is expected to be reduced, leading to an overall reduction of the cost of the re-certification process [1]

The quantity and nature of in-vehicle cognitive demands experienced by real-world drivers

A real-world driving study was conducted into the cognitive demands within the cabin of a modern domestic car. The quantity and nature of the interactions were recorded, along with dashboard and centre console glances. Ethnographic data was collected from a sample of 8 drivers using remote video analysis and a journey diary. The results suggest that glancing at the dashboard is the highest singularly demanding task, and the highest cognitive demands occur when several types of visuospatial sketchpad representational information are presented to the driver. Therefore, the type of information presented may be more demanding than the area it comes from

Mission-Critical Systems Design Framework

Safety-critical systems are well documented and standardized (e.g. IEC 61508, RTCA DO-178B) within system design cycles. However in Defence and Security, systems that are critical to the success of a Mission are not defined within the literature nor are there any guidelines in defining criticality in their design or operational capabilities. When it comes to Vetronics (Vehicle Electronics), a mission-critical system, is a system with much complexity and mixed criticality levels that is a part of the overall platform (military vehicle) offering integrated system capabilities. In this paper, a framework is presented, providing guidelines in designing efficiently and effectively mission-critical systems considering principles of Interoperable Open Architectures (IOA), mission-critical integrity levels and following new standardization activities such as NATO Generic Vehicle Architecture (NGVA). A Defensive Aid Suite (DAS) system is used as a case study to illustrate how this framework can be exploited. The indention of this extension is to provide an approach to precisely estimate threats in order to de-risk missions in the very early stages

Architecture and Instruction Set Design of an ATM Network Processor

Microprocessor architectures are diversifying to support niche market requirements, with growing emphasis for performance delivery on the architectural design rather than the silicon implementation. This paper outlines the architectural design, programmer's model and instruction set of a microprocessor, which adopts a novel approach to network data. In particular, Asynchronous Transfer Mode (ATM) cells are delivered to a special FIFO cache memory, located at the heart of the processor. Cell input and output is conducted at wire speed using dedicated streaming input and output hardware. Special read and write instructions then allow the cell payloads to be accessed directly, and transferred from/to the register file. Multimedia applications have previously been identified as an important market for such a network centric architecture. Therefore the paper ends with a demonstration of the power of some key instructions. A motion estimation kernel from the MPEG standard is used to exercise the architecture and instruction set. Execution speed is shown to be comparable to today's processors, using only a 400 MHz clock for a full search. The minimally resourced design is therefore suited to embedded network applications from both economic and performance standpoints