A Portable System with 0.1-ppm RMSE Resolution for 1-10 MHz Resonant MEMS Frequency Measurement

This article presents a portable and programmable frequency measurement system (PrO-FMS) with 0.1-ppm RMSE resolution over a measurement time interval of 33.2 s for bulk-acoustic resonator applications. PrO-FMS has a feature of choosing a frequency estimation method and accordingly the sampling frequency, which is programmable. Five frequency estimation methods, Candan, Djukanovic, Prony, M-Pisarenko, and zero crossing interpolation methods, are reviewed for high-resolution frequency measurement. PrO-FMS can also be reconfigured to select a particular resonance mode over a range of 1-10 MHz. Measurement results are provided for two different commercial quartz crystals and a microfabricated in-plane bulk acoustic resonator in two different modes of resonance. The results of these estimation methods are compared with a standard commercial tabletop frequency counter. Measurement results show that PrO-FMS can achieve a resolution of 0.1 ppm RMSE. For the same gate time, PrO-FMS provides better resolution than standard tabletop frequency counter. This article also provides a study on the behavior of the five different frequency estimation methods for short-and long-term measurements for quartz crystals and bulk acoustic resonator in two different modes

Evaluation of the performance of TDR and capacitance techniques for soil moisture measurement

Though researchers have employed various techniques (gravimetric, electromagnetic, neutron scattering, heat pulse, micro-wave and optical remote sensing techniques) for soil moisture measurement, dielectric based techniques (Time Domain Reflectometry, TDR, and capacitance technique, CT) have gained much more popularity, mainly due to revolutionary developments in the field of electronics and data communication systems. However, suitability and relative performance of these techniques for moisture measurement of soils is a point of debate. Hence, in order to address this issue, extensive studies were conducted on the soils of entirely different characteristics, compacted at various compaction states (dry density and water content) by employing TDR and capacitance probes. Subsequently, the dielectric constant of the soil and its bulk electrical conductivity were obtained using these probes and compared against each other and that computed from Topp’s equation, which is a well-established relationship between the dielectric constant of the soil and its volumetric moisture content. An attempt was also made to correlate Ka values obtained from the dielectric techniques and Topp’s equation with that of Time Propagation (TP) mixing model, which incorporates in it the properties of the soil matrix as well. It has been observed that Ka-TDR matches well with the Ka-Topp and Ka-TP, while the best match has been observed between Ka-TDR and Ka- Topp as compared to the Ka-CT. As such, the study demonstrates, clearly, that Topp’s equation, which ignores the soil specific parameters, is capable of determining the soil moisture content appropriately . This study proposes an empirical equation which relates dielectric constants obtained from Topp's equation to those obtained from the TDR, capacitance technique and TP mixing model. Such a relationship can be further utilized for estimating the volumetric soil moisture content

Design of A Novel Highly EMI-Immune CMOS Miller OpAmp Considering Channel Length Modulation

This paper presents a novel CMOS Miller operational amplifier (OpAmp) that has high immunity to electromagnetic interference (EMI). The proposed CMOS Miller OpAmp uses the replica concept with the source-buffered technique in order to achieve high EMI immunity across a wide range of frequencies (10 MHz to 1 GHz). The proposed amplifier is designed using the first-order quadratic mathematical model. The modeling includes the body effect and channel length modulation. The circuit has been fabricated using 0.18 $\mu \text{m}$ mixed-mode CMOS technology. Measurement results illustrate how the proposed Miller OpAmp reduces susceptibility to EMI even in the presence of high-amplitude interferences that are as high as 1 Vpp. Experimental results show that the maximum EMI-induced output offset voltage for the proposed Miller OpAmp is less than 10 mV over a wide range of frequencies (10 MHz to 1 GHz) when a 900 mVpp EMI signal is injected into the noninverting input. In contrast, the classic Miller OpAmp generates a maximum output offset voltage of 215 mV at 1 GHz under the same operating conditions. The measured results of the EMI-induced input offset corroborates the circuit simulations. © 2017 IEEE

Low-power low-noise analog signal conditioning chip with on-chip drivers for healthcare applications

This paper presents an ultra low-noise, low-voltage complete analog signal conditioning chip, fabricated in 180 nm mixed-mode CMOS process. In contrast to many already-reported biomedical chips the test chip has been fabricated in a relatively scaled technology operating at low supply voltage of 1.8 V. This enables targeting energy-efficient hand-held biomedical devices where low-noise analog signal conditioning, preliminary processing and low-power wireless functionalities will be integrated on one chip. The test chip features instrumentation amplifier (INA) with chopper modulation at the first stage. The second stage is a novel area efficient spike removal filter (SRF) for attenuating coupled chopping spikes. The last stage is a differential active RC filter to adjust gain and bandwidth of the forward channel. On-chip non-overlapping clock generators with frequency of 4 kHz and 8 kHz for SRF stage are also implemented on the test. The chip also features a reconfigurable driven-right-leg circuit (DRLC) and shield drive amplifier (SDA) in the feedback path specifically for portable healthcare instruments. The DRLC provides the feedback either with operational amplifier (op-amp) or operational transconductance amplifier (OTA), configurable by the user. The presented test chip, for the first time, demonstrates an integrated OTA-based DRLC along with INA. INA and drivers have been designed and optimized for minimum power dissipation using a power-oriented design flow. The measurement results show that the INA achieves input-referred noise density of 28 nv/root Hz and DC current of 5.9 mu A maintaining minimum of 109 dB at 1.91 kHz. Measurements also show that 34 dB interference reduction at 50 Hz is achieved with DRLC. Low operating voltage, wide range of specifications and reconfigurable modules and interconnections enable the chip to be used for broad range of signal conditioning applications. (C) 2012 Elsevier Ltd. All rights reserved

Evaluation of the impact of layout on device and analog circuit performance with lateral asymmetric channel MOSFETs

Lateral asymmetric channel (LAC) or single halo devices have been reported to exhibit excellent short channel behavior in the sub-100-nm regime. In this paper, we have quantified the performance degradation in LAC devices due to fingered layouts. Our mixed-mode two-dimensional simulation results show that though the fingered layout of the device limits the performance of these MOSFETs, they still show superior performance over the conventional devices in the sub-100-nm channel length regime. We also present the simulation results of a two-stage operational amplifier with LAC and conventional devices using a 0.13-mu m technology with the help of look-up table simulations. Our results show that for the given design specifications, an OPAMP layout with conventional devices occupies 18% more chip area compared to the LAC device

Complementary Organic Circuits Using Evaporated F(16)CuPc and Inkjet Printing of PQT

Organic complementary inverters and ring oscillators are fabricated using a unique combination of inkjet printing and evaporation of organic semiconductors. p-Type poly (3, 3'''-didodecylquaterthiophene) (PQT) is inkjet printed, after which n-type copper hexadecafluorophthalocyanine (F(16)CuPc) is evaporated and patterned by shadow masking. A solution-processable bilayer gate dielectric with superior gate leakage characteristics and a simplified process stack is implemented. The inverters show a high noise margin, good gain characteristics, and a switching point close to V(dd)/2. A five-stage ring oscillator is also demonstrated