Выбор схемы программирования мемристорных элементов

Introduction. An array of memristive elements can be used in prospective neural computing systems as a programmable resistance (analog multiplication factor) when performing operations of analog vector multiplication, discrete in time. To form the required resistance, the memristor should be subjected to a programming procedure. This article discusses conventional programming schemes and proposes a new versatile programming scheme for memristor elements.Aim. To identify or develop an optimal programming scheme for memristors by analyzing the advantages and disadvantages of existing methods.Materials and methods. The programming procedure can be carried out using either SET or RESET, depending on a different direction of movement according to the volt-ampere characteristic of the memory and its transfer to a particular state. The programming process is controlled in the LTspice circuit modeling program.Results. Typical programming schemes of memristors were analyzed; advantages and disadvantages of existing methods were revealed. A new versatile circuit based on a variable resistor was proposed. The circuit was simulated both under a fixed resistance of the variable resistor and when varying the memristor resistance values within their permissible range.Conclusion. In comparison with the RESET mode, the SET programming mode provides for a greater linearity of variations in the memristor resistance. The use of a circuit based on a variable resistor and a bipolar voltage source allows programming of any type and eliminates the need for recommutation of the memristor. The simulation results confirm the feasibility of the proposed method. The proposed circuit can be complemented not only with a comparator, but also with an ADC. This will provide the possibility of selecting various means for measuring the memristor resistance both during programming and for the purpose of monitoring the memristor resistance at the end of the procedure.Введение. Массив мемристивных элементов может быть использован в перспективных системах нейровычислений в качестве программируемого сопротивления (аналогового коэффициента умножения) при проведении операций аналогового умножения векторов дискретного по времени. Для формирования требуемого сопротивления мемристор должен быть подвергнут процедуре "программирования". В статье рассматриваются типовые схемы программирования и предлагается новая схема универсального устройства программирования мемристора.Цель работы. Выявить или разработать оптимальную схему программирования мемристоров, анализируя преимущества и недостатки существующих способов.Материалы и методы. Процедура программирования может быть осуществлена двумя способами – SET и RESET, связанными с различным направлением движения по вольт-амперной характеристике мемристора и его переводом в то или иное состояние. Контроль процесса программирования осуществляется в программе схемотехнического моделирования LTspice.Результаты. Проанализированы типовые схемы программирования мемристора, выявлены преимущества и недостатки существующих способов. Предложена новая универсальная схема с использованием переменного резистора. Проведено схемотехническое моделирование при фиксированном значении сопротивления переменного резистора и при вариации разных значений сопротивления в пределах допустимых значений сопротивлений мемристора.Заключение. Режим программирования SET позволяет достичь большей линейности изменения сопротивления мемристора по сравнению с режимом RESET. Применение схемы с использованием переменного резистора и двухполярного источника напряжения позволяет осуществить программирование любого типа и исключает необходимость перекоммутации мемристора. Результаты моделирования подтверждают работоспособность предложенного способа. Дополнительно к наличию компаратора в схему можно ввести и АЦП для возможности выбора средства измерения сопротивления мемристора как в процессе проведения программирования, так и для целей контроля сопротивления мемристора по окончании процедуры

Effect of pulse amplitude on depression and potentiation of ZrO2(Y)-based memristive synaptic device

The effect of the amplitude of depressing and potentiating pulses on the synaptic plasticity (potentiation and depression) of a memristive device based on the Ta/ZrO2(Y)/Pt stack has been experimentally studied. It is shown that the amplitude of depressing and potentiating pulses affects the synaptic plasticity, namely, the value of current passing through the memristive device. The presented results demonstrate the prospects of using the ZrO2(Y)-based memristive devices as stable and low-power elements of neuromorphic systems

Neurohybrid memristive cmos-integrated systems for biosensors and neuroprosthetics

© 2020 Mikhaylov, Pimashkin, Pigareva, Gerasimova, Gryaznov, Shchanikov, Zuev, Talanov, Lavrov, Demin, Erokhin, Lobov, Mukhina, Kazantsev, Wu and Spagnolo. Here we provide a perspective concept of neurohybrid memristive chip based on the combination of living neural networks cultivated in microfluidic/microelectrode system, metal-oxide memristive devices or arrays integrated with mixed-signal CMOS layer to control the analog memristive circuits, process the decoded information, and arrange a feedback stimulation of biological culture as parts of a bidirectional neurointerface. Our main focus is on the state-of-the-art approaches for cultivation and spatial ordering of the network of dissociated hippocampal neuron cells, fabrication of a large-scale cross-bar array of memristive devices tailored using device engineering, resistive state programming, or non-linear dynamics, as well as hardware implementation of spiking neural networks (SNNs) based on the arrays of memristive devices and integrated CMOS electronics. The concept represents an example of a brain-on-chip system belonging to a more general class of memristive neurohybrid systems for a newgeneration robotics, artificial intelligence, and personalized medicine, discussed in the framework of the proposed roadmap for the next decade period

Silicon-Compatible Memristive Devices Tailored by Laser and Thermal Treatments

Nowadays, memristors are of considerable interest to researchers and engineers due to the promise they hold for the creation of power-efficient memristor-based information or computing systems. In particular, this refers to memristive devices based on the resistive switching phenomenon, which in most cases are fabricated in the form of metal–insulator–metal structures. At the same time, the demand for compatibility with the standard fabrication process of complementary metal–oxide semiconductors makes it relevant from a practical point of view to fabricate memristive devices directly on a silicon or SOI (silicon on insulator) substrate. Here we have investigated the electrical characteristics and resistive switching of SiOx- and SiNx-based memristors fabricated on SOI substrates and subjected to additional laser treatment and thermal treatment. The investigated memristors do not require electroforming and demonstrate a synaptic type of resistive switching. It is found that the parameters of resistive switching of SiOx- and SiNx-based memristors on SOI substrates are remarkably improved. In particular, the laser treatment gives rise to a significant increase in the hysteresis loop in I–V curves of SiNx-based memristors. Moreover, for SiOx-based memristors, the thermal treatment used after the laser treatment produces a notable decrease in the resistive switching voltage

Noise-assisted persistence and recovery of memory state in a memristive spiking neuromorphic network

We investigate the constructive role of an external noise signal, in the form of a low-rate Poisson sequence of pulses supplied to all inputs of a spiking neural network, consisting in maintaining for a long time or even recovering a memory trace (engram) of the image without its direct renewal (or rewriting). In particular, this unique dynamic property is demonstrated in a single-layer spiking neural network consisting of simple integrate-and-fire neurons and memristive synaptic weights. This is carried out by preserving and even fine-tuning the conductance values of memristors in terms of dynamic plasticity, specifically spike-timing-dependent plasticity-type, driven by overlapping pre- and postsynaptic voltage spikes. It has been shown that the weights can be to a certain extent unreliable, due to such characteristics as the limited retention time of resistive state or the variation of switching voltages. Such a noise-assisted persistence of memory, on one hand, could be a prototypical mechanism in a biological nervous system and, on the other hand, brings one step closer to the possibility of building reliable spiking neural networks composed of unreliable analog elements