Electronic Tuning Square-Wave Generators with Improved Linearity Using Operational Transresistance Amplifier

Two new electronic tuning current-mode square-wave generators are introduced in the ensuing paper. In the first proposed square-wave generator circuit, one Operational Trans-resistance Amplifier (OTRA) and two passive components are involved, along with two NMOS depletion mode transistors. This circuit generates a square-wave with almost equal and fixed duty cycles. The second proposed circuit is able to control both on-duty and off-duty cycles independently with the help of two passive components, two NMOS depletion mode transistors, and two diodes connected to the circuit. The frequency of the proposed circuits can be adjusted with the passive components connected to the circuit. Moreover, electronic tuning can also be achieved with the proposed circuits. The measured results that are included in the paper show the linear variation of a time period as compared with existing OTRA based square waveform generator. The performance of the proposed circuits is examined while using SPICE models. These circuits are built on a laboratory breadboard using commercially available Current Feedback Operational Amplifier (AD844 AN) and passive components are connected externally and tested for square waveform generation. The obtained results demonstrate good agreement with the theoretical values

Four new oscillators using operational transresistance amplifier

In this paper, four new sinusoidal waveform generators based on the operational transresistance amplifier (OTRA) are presented. The first proposed circuit is a minimum component RC sinusoidal oscillator circuit with one OTRA and a few passive components. The second and third proposed circuits consist of one OTRA and a few passive components, among them two passive components are connected to ground. These circuits are able to control the condition of oscillation and frequency of oscillation independently. The fourth proposed quadrature oscillator circuit uses two OTRAs as main active building blocks and a few external passive components to generate the oscillations. The commercially available IC AD844AN has been adopted to implement the proposed circuits on a laboratory breadboard with external passive components. Both the SPICE simulation and experimental results are given to verify the theoretical analysis of the proposed circuits

Implementation of Power Efficient Flash Analogue-to-Digital Converter

An efficient low power high speed 5-bit 5-GS/s flash analogue-to-digital converter (ADC) is proposed in this paper. The designing of a thermometer code to binary code is one of the exacting issues of low power flash ADC. The embodiment consists of two main blocks, a comparator and a digital encoder. To reduce the metastability and the effect of bubble errors, the thermometer code is converted into the gray code and there after translated to binary code through encoder. The proposed encoder is thus implemented by using differential cascade voltage switch logic (DCVSL) to maintain high speed and low power dissipation. The proposed 5-bit flash ADC is designed using Cadence 180 nm CMOS technology with a supply rail voltage typically ±0.85 V. The simulation results include a total power dissipation of 46.69 mW, integral nonlinearity (INL) value of −0.30 LSB and differential nonlinearity (DNL) value of −0.24 LSB, of the flash ADC