Nitric oxide adsorption on Ru(001) at 78 and 120 K: Temperature dependence on the bonding geometry

The influence of surface temperature on NO adsorption on Ru(001) between 78 and 120 K has been investigated by high-resolution electron energy-loss spectroscopy (EELS) and thermal desorption mass spectrometry. Metastable NO adsorption states were isolated at 78 K and were identified by EELS. In all cases, heating of the NO overlayer from 78 to 120 K resulted in an irreversible conversion between adsites. All the measurements were performed in an UHV system that has been described in detail previously. Experimental techniques were employed that have also been documented thoroughly

Gate dielectrics: process integration issues and electrical properties, Journal of Telecommunications and Information Technology, 2005, nr 1

In this work we report on the process integration of crystalline praseodymium oxide (Pr2O3) high-k gate dielectric. Key process steps that are compatible with the high-k material have been developed and were applied for realisation of MOS structures. For the first time Pr2O3 has been integrated successfully in a conventional MOS process with n+ poly-silicon gate electrode. The electrical properties of Pr2O3 MOS capacitors are presented and discussed

Novel Electrostatically Doped Planar Field-Effect Transistor for High Temperature Applications

In this paper, we present experimental results and simulation data of an electrostatically doped and therefore voltage-programmable, planar, CMOS-compatible field-effect transistor (FET) structure. This planar device is based on our previously published Si-nanowire (SiNW) technology. Schottky barrier source/drain (S/D) contacts and a silicon-on-insulator (SOI) technology platform are the key features of this dual-gated but single channel universal FET. The combination of two electrically independent gates, one back-gate for S/D Schottky barrier modulation as well as channel formation to establish Schottky barrier FET (SBFET) operation and one front-gate forming a junctionless FET (JLFET) for actual current control, significantly increases the temperature robustness of the device.Comment: 18 pages, 11 figure

Silicon-CMOS Compatible In-Situ CCVD Grown Graphene Transistors with Ultra-High On/Off-Current Ratio

By means of catalytic chemical vapor deposition (CCVD) in-situ grown monolayer graphene field-effect transistors (MoLGFETs) and bilayer graphene transistors (BiLGFETs) are realized directly on oxidized silicon substrate without the need to transfer graphene layers. In-situ grown MoLGFETs exhibit the expected Dirac point together with the typical low on/off-current ratios. In contrast, BiLGFETs possess unipolar p-type device characteristics with an extremely high on/off-current ratio up to 1E7. The complete fabrication process is silicon CMOS compatible. This will allow a simple and low-cost integration of graphene devices for nanoelectronic applications in a hybrid silicon CMOS environment.Comment: 16 pages, 4 figure

Transfer-free fabrication of graphene transistors

We invented a method to fabricate graphene transistors on oxidized silicon wafers without the need to transfer graphene layers. To stimulate the growth of graphene layers on oxidized silicon a catalyst system of nanometer thin aluminum/nickel double layer is used. This catalyst system is structured via liftoff before the wafer enters the catalytic chemical vapor deposition (CCVD) chamber. In the subsequent methane based growth process monolayer graphene field-effect transistors (MoLGFETs) and bilayer graphene transistors (BiLGFETs) are realized directly on oxidized silicon substrate, whereby the number of stacked graphene layers is determined by the selected CCVD process parameters, e.g. temperature and gas mixture. Subsequently, Raman spectroscopy is performed within the channel region in between the catalytic areas and the Raman spectra of fivelayer, bilayer and monolayer graphene confirm the existence of graphene grown by this silicon-compatible, transfer-free and in-situ fabrication approach. These graphene FETs will allow a simple and low-cost integration of graphene devices for nanoelectronic applications in a hybrid silicon CMOS environment.Comment: 15 pages, 4 figure

Transfer-free Grown Bilayer Graphene Transistors for Digital Applications

We invented a novel method to fabricate graphene transistors on oxidized silicon wafers without the need to transfer graphene layers. By means of catalytic chemical vapor deposition (CCVD) the in-situ grown bilayer graphene transistors (BiLGFETs) are realized directly on oxidized silicon substrate, whereby the number of stacked graphene layers is determined by the selected CCVD process parameters, e.g. temperature and gas mixture. BiLGFETs exhibit ultra-high on/off-current ratios of 107 at room temperature, exceeding previously reported values by several orders of magnitude. This will allow a simple and low-cost integration of graphene devices for digital nanoelectronic applications in a hybrid silicon CMOS environment for the first time.Comment: 7 pages, 4 figures. arXiv admin note: substantial text overlap with arXiv:1112.4320, arXiv:1111.639

Evaluation of MOSFETs with crystalline high-k gate-dielectrics: device simulation and experimental data, Journal of Telecommunications and Information Technology, 2007, nr 2

The evaluation of the world’s first MOSFETs with epitaxially-grown rare-earth high-k gate dielectrics is the main issue of this work. Electrical device characterization has been performed on MOSFETs with high-k gate oxides as well as their reference counterparts with silicon dioxide gate dielectric. In addition, by means of technology simulation with TSUPREM4, models of these devices are established. Current-voltage characteristics and parameter extraction on the simulated structures is conducted with the device simulator MEDICI. Measured and simulated device characteristics are presented and the impact of interface state and fixed charge densities is discussed. Device parameters of high-k devices fabricated with standard poly-silicon gate and replacement metal gate process are compared

Annual Survey of Virginia Law: Employment Law

This survey covers legislative and judicial developments in Virginia employment law between June 1986 and June 1987. It does not address the workers\u27 compensation and unemployment compensation statutes but focuses on state labor and fair employment laws and the employment-at-will doctrine