The integration of InGaP LEDs with CMOS on 200 mm silicon wafers

The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems

Characterization of Cu-Sn-In thin films for three-dimensional heterogeneous system integration

Cu/Sn-In solder thin films were studied as a low temperature bonding material for 3D heterogeneous system integration. A new technique based on observation of color changes and combinatorial deposition of solder thin films was developed to investigate the intermetallic compound (IMC) growth kinetics in Cu/Sn and Cu/SnxIn100-x bilayer systems. A general model for IMC growth kinetics in these systems was developed and was found to be in close agreement with experimental data. The model considers the diffusive flux of Cu and Sn through the IMC layer and the reaction fluxes of Cu and Sn atoms at the Cu/IMC and IMC/Sn interfaces. It was observed that IMC growth is controlled by the rate of reaction between Cu and Sn for thin IMCs. On the other hand, Cu diffusion along IMC grain boundaries and Sn diffusion through the IMC lattice is the rate limiting step for thick IMCs at low and high temperatures, respectively. It was also discovered that an addition of 44% In into Sn solder leads to the fastest IMC growth in Cu/SnxIn100-x bilayer films. Microcantilevers coupled with combinatorial deposition were used to characterize the residual stress, Young's modulus and fracture strength of Cu-Sn-In thin films. Measurement inaccuracies due to cantilever non-idealities were corrected using finite element simulations and deflection measurements at multiple locations. It was discovered that an alloy with 46% In in Sn resulted in an IMC with the highest fracture strength. The findings of this study demonstrate the potential of Sn-In solder in lowering the bonding temperature and increasing the fracture strength of the resulting IMC. Moreover, the techniques developed in this study provide a highly efficient general approach for finding solder compositions that allow the fastest and/or slowest IMC growth rate, as well as the most desirable mechanical properties.DOCTOR OF PHILOSOPHY (MSE

Monolithic integration of Si-CMOS and III-V-on-Si through direct wafer bonding process

Integration of silicon-complementary metal oxide-semiconductor (Si-CMOS) and III-V compound semiconductors (with device structures of either InGaAs HEMT, AlGaInP LED, GaN HEMT, or InGaN LED) on a common Si substrate is demonstrated. The Si-CMOS layer is temporarily bonded on a Si handle wafer. Another III-V/Si substrate is then bonded to the Si-CMOS containing handle wafer. Finally, the handle wafer is released to realize the Si-CMOS on III-V/Si substrate. For GaN HEMT or LED on Si substrate, additional wafer bonding step is required to replace the fragile Si (111) substrate after high temperature GaN growth with a new Si (001) wafer to improve the robustness of the GaN/Si wafers. Through this substrate replacement step, the bonded wafer pair can survive the subsequent processing steps. The monolithic integration of Si-CMOS + III-V devices on a common Si platform enables new generation of systems with more functionality, better energy efficiency, and smaller form factor.NRF (Natl Research Foundation, S’pore)Published versio

Fe-facilitated dynamic active-site generation on spinel CoAl2O4 with self-termination of surface reconstruction for water oxidation

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