8 research outputs found

    The integration of InGaP LEDs with CMOS on 200 mm silicon wafers

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    The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems

    Anomalous Source-Side Degradation of InAlN/GaN HEMTs Under High-Power Electrical Stress

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    The electrical degradation of InAlN/GaN high-electron-mobility transistors for millimeter-wave applications has been examined under simultaneous high V [subscript DS,stress] and high I[subscript Dstress] electrical stress. Besides a drain current decrease and a positive threshold voltage shift, the creation of an anomalous source-side gate leakage path has been identified. We attribute this to high electric-field induced trap generation in the AlN layer directly under the gate edge on the source side. The resulting increase in gate leakage further exacerbates the degradation of the gate diode. In addition, we postulate that high-power stress leads to significant device self-heating that causes gate sinking and leads to a permanent positive threshold voltage shift and drain current degradation

    Mesoporous titanium oxynitride monoliths from block copolymer-directed self-assembly of metal-urea additives

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    This report describes a simple one-pot soft-templating and ammonolysis-free approach to synthesize mesoporous crystalline titanium oxynitride by combining block copolymer-directed self-assembly with metal sol and urea precursors. The Pluronic F127 triblock copolymer was employed to structure-direct titanium-oxo-acetate sol nanoparticles and urea-formaldehyde into ordered hybrid mesostructured monoliths. The hybrid composites were directly converted into mesoporous crystalline titanium oxynitride and retained macroscale monolithic integrity up to 800 °C under nitrogen. Notably, the urea-formaldehyde additive provided nitrogen and rigid support to the inorganic mesostructure during crystallization. The resultant mesoporous titanium oxynitride exhibited good electrochemical catalytic activity toward hydrogen evolution reaction in 1 M KOH aqueous medium under applied bias. Our results suggest an inexpensive and safe pathway to generate ordered mesoporous crystalline metal oxynitride structures suitable for catalyst and energy-storage applications.National Research Foundation (NRF)This work was supported by a startup grant from Nanyang Technological University, Singapore. S.M. and W.M.Jr. wish to acknowledge financial support from the National Research Foundation of Singapore (NRF) Investigatorship Award (NRFI 2017-08). This work made use of research facilities at the Facility for Analysis, Characterization, Testing and Simulation (FACTS), Nanyang Technological University, Singapore. The authors gratefully acknowledge J. C. Kuan, R. Lee, T. Salim, G. L. Seah and Y. Y. Tay for kind experimental assistance and discussion

    Ordered mesoporous alumina with tunable morphologies and pore sizes for COâ‚‚ capture and dye separation

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    We describe a versatile and scalable strategy toward long-range and periodically ordered mesoporous alumina (Al2O3) structures by evaporation-induced self-assembly of a structure-directing ABA triblock copolymer (F127) mixed with aluminum tri-sec-butoxide-derived sol additive. We found that the separate preparation of the alkoxide sol-gel reaction before mixing with the block copolymer enabled access to a relatively unexplored parameter space of copolymer-to-additive composition, acid-to-metal molar ratio, and solvent, yielding ordered mesophases of two-dimensional (2D) lamellar, hexagonal cylinder, and 3D cage-like cubic lattices, as well as multiscale hierarchical ordered structures from spinodal decomposition-induced macro- and mesophase separation. Thermal annealing in air at 900 °C yielded well-ordered mesoporous crystalline γ-Al2O3 structures and hierarchically porous γ-Al2O3 with 3D interconnected macroscale and ordered mesoscale pore networks. The ordered Al2O3 structures exhibited tunable pore sizes in three different length scales, <2 nm (micropore), 2-11 nm (mesopore), and 1-5 μm (macropore), as well as high surface areas and pore volumes of up to 305 m2/g and 0.33 cm3/g, respectively. Moreover, the resultant mesoporous Al2O3 demonstrated enhanced adsorption capacities of carbon dioxide and Congo red dye. Such hierarchically ordered mesoporous Al2O3 are well-suited for green environmental solutions and urban sustainability applications, for example, high-temperature solid adsorbents and catalyst supports for carbon dioxide sequestration, fuel cells, and wastewater separation treatments.Nanyang Technological UniversityThis work was supported by a member-directed research grant from ExxonMobil through the Singapore Energy Center (EM11161.TO6) and a startup grant from Nanyang Technological University, Singapore. This work made use of research facilities at the Facility for Analysis, Characterization, Testing and Simulation (FACTS), Nanyang Technological University, Singapore. C.T. gratefully acknowledges an overseas training program grant from King Mongkut’s Institute of Technology Ladkrabang

    Impact of deposition conditions on the crystallization kinetics of amorphous GeTe films

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    The speed at which phase change memory devices can operate depends strongly on the crystallization kinetics of the amorphous phase. To better understand factors that affect the crystallization rate, we have investigated crystallization of GeTe films as a function of their deposition temperatures and deposition rates, using X-ray synchrotron radiation and Raman spectroscopy. As-deposited films were found to be fully amorphous under all conditions, even though films deposited at higher temperatures and lower rates experienced lower effective quench rates. Non-isothermal transformation curves show that the apparent crystallization temperature of GeTe films decreases with increasing deposition temperature and decreasing deposition rate. It was found that this correlates with a decrease in the activation energy for nucleation (calculated using Kissinger’s analysis), while the activation energy for crystal growth remained unaffected. From Raman spectroscopy measurements, it was found that increasing the deposition temperature or decreasing the deposition rate, and therefore the effective quench rate, reduces the number of homopolar Te–Te bonds and thereby reduces the barrier to crystal nucleation.Singapore-MIT Alliance for Research and Technology (SMART

    Monolithic integration of Si-CMOS and III-V-on-Si through direct wafer bonding process

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    Integration of silicon-complementary metal oxide-semiconductor (Si-CMOS) and III-V compound semiconductors (with device structures of either InGaAs HEMT, AlGaInP LED, GaN HEMT, or InGaN LED) on a common Si substrate is demonstrated. The Si-CMOS layer is temporarily bonded on a Si handle wafer. Another III-V/Si substrate is then bonded to the Si-CMOS containing handle wafer. Finally, the handle wafer is released to realize the Si-CMOS on III-V/Si substrate. For GaN HEMT or LED on Si substrate, additional wafer bonding step is required to replace the fragile Si (111) substrate after high temperature GaN growth with a new Si (001) wafer to improve the robustness of the GaN/Si wafers. Through this substrate replacement step, the bonded wafer pair can survive the subsequent processing steps. The monolithic integration of Si-CMOS + III-V devices on a common Si platform enables new generation of systems with more functionality, better energy efficiency, and smaller form factor.NRF (Natl Research Foundation, S’pore)Published versio

    High-performance AlGaInP light-emitting diodes integrated on silicon through a superior quality germanium-on-insulator

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    © 2018 Chinese Laser Press. High-performance GaInP/AlGaInP multi-quantum well light-emitting diodes (LEDs) grown on a low threading dislocation density (TDD) germanium-on-insulator (GOI) substrate have been demonstrated. The low TDD of the GOI substrate is realized through Ge epitaxial growth, wafer bonding, and layer transfer processes on 200 mm wafers. With O2 annealing, the TDD of the GOI substrate can be reduced to ∼1.2 ×106 cm−2. LEDs fabricated on this GOI substrate exhibit record-high optical output power of 1.3 mW at a 670 nm peak wavelength under 280 mA current injection. This output power level is at least 2 times higher compared to other reports of similar devices on a silicon (Si) substrate without degrading the electrical performance. These results demonstrate great promise for the monolithic integration of visible-band optical sources with Si-based electronic circuitry and realization of high-density RGB (red, green, and blue) micro-LED arrays with control circuitry
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