1,924 research outputs found
P-Cygni Type Lya from Starburst Galaxies
P-Cygni type Lya profiles exhibited in nearly half of starburst galaxies,
both nearby and high-z, are believed to be formed by an expanding supershell
surrounding a star-forming region. We apply the Monte Carlo code which was
developed previously for static and plane-parallel medium to calculate the Lya
line transfer in a supershell of neutral hydrogen which are expanding radially
in a spherical bulk flow. We consider typical cases that the supershell has the
Lya line-centre optical depth of , a radial expansion
velocity of \tau_0$ and V_exp of the
supershell. We discuss the effects of dust extinction and the implication of
our works in relation to recent spectroscopic observations of starburst
galaxies.Comment: 15 pages, 6 figures, submitted to MNRA
Upstream Transmission Effects of Generic Advertising and Promotion: The Case of Soybeans
This dissertation aims at analyzing the effects of various assumptions that may affect the upstream transmission of the benefits of commodity checkoff programs. Despite the amount of econometric research on evaluation of the effects of checkoff programs for producer benefits, little empirical research has focused on the various simplifying assumptions often made in those analyses that may influence the rate and extent of the retail-to-farm transmission of generic advertising and promotion effects. The first part of this study is a qualitative analysis of the world soybean and soybean products markets. Then the conceptual model is proposed and discussed. A model of world soybean and soybean markets has been developed which relaxes all of the simplifying assumptions often made in analyses of commodity checkoff programs. The model is used to analyze the implications of those assumptions for the upstream transmission of the returns of the soybean checkoff program to producers.
After estimating the econometric parameters of the model, the model has been simulated over history as a means of model validation. Then the model has been simulated again assuming that the U.S. soybean checkoff program had not existed over history. The differences from the simulation results by the baseline simulation are considered as the base case against which all other simulation results are compared. The base case results indicate that the soybean checkoff program has been highly effective over the study period returning $6.9 in revenue to soybean producers for every checkoff dollar spent.
This upstream transmission of the benefits of the soybean checkoff program is analyzed through a series of simulations with the world soybean model in which the simplifying assumptions made by other checkoff program analyses. These are imposed on the model including the assumptions of no supply response, no price response, no government intervention, no free riders, no domestic supply chain linkages, no global supply chain linkages, no checkoff investments in production research and no promotion programs at multiple levels of the supply chain. The results of the scenario simulations provide the evidence that simplifying assumptions made in checkoff program analyses can seriously bias the calculation of the benefit-cost ratios (BCRs) for checkoff programs. Some assumptions have a tendency of overestimating the BCR for checkoff programs while others have a tendency of underestimating the BCR calculation. The implication of these findings is that analyses of checkoff programs must consider carefully the simplifying assumptions made to avoid seriously under- or over-estimating the returns of those programs to producers
Circuit Structure and Control Method to Reduce Size and Harmonic Distortion of Interleaved Dual Buck Inverter
A new circuit structure and control method for a high power interleaved dual-buck inverter are proposed. The proposed inverter consists of six switches, four diodes and two inductors, uses a dual-buck structure to eliminate zero-cross distortion, and operates in an interleaved mode to reduce the current stress of switch. To reduce the total harmonic distortion at low output power, the inverter is controlled using discontinuous-current-mode control combined with continuous-current-mode control. The experimental inverter had a power-conversion efficiency of 98.5% at output power = 1300 W and 98.3% at output power = 2 kW, when the inverter was operated at an input voltage of 400 V-DC, output voltage of 220 V-AC/60 Hz, and switching frequency of 20 kHz. The total harmonic distortion was < 0.66%, which demonstrates that the inverter is suitable for high-power dc-ac power conversion.11Ysciescopu
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High efficiency wideband low-power delta-sigma modulators
Delta-sigma analog-to-digital converters traditionally have been used for low speed, high resolution applications such as measurements, sensors, voice and audio systems. Through continued device scaling in CMOS technology and architectural and circuit level design innovations, they have even become popular for wideband, high dynamic range applications such as wired and wireless communication systems. Therefore, power efficient wideband low power delta-sigma data converters that bridges analog and digital have become mandatory for popular mobile applications today. In this dissertation, two architectural innovations and a development and realization of a state-of-the-art delta-sigma analog to digital converter with effective design techniques in both architectural and circuit levels are presented. The first one is timing-relaxed double noise coupling which effectively provides 2nd order noise shaping in the noise transfer function and overcomes stringent timing requirement for quantization and DEM. The second one presented is a noise shaping SAR quantizer, which provides one order of noise shaping in the noise transfer function. It uses a charge redistribution SAR quantizer and is applied to a timing-relaxed lowdistortion delta-sigma modulator which is suitable for adopting SAR quantizer. Finally a cascade switched capacitor delta-sigma analog-to-digital converter suitable for WLAN applications is presented. It uses a noise folding free double sampling technique and an improved low-distortion architecture with an embedded-adder integrator. The prototype chip is fabricated with a double poly, 4 metal, 0.18μm CMOS process. The measurement result achieves 73.8 dB SNDR over 10 MHz bandwidth. The figure of merit defined by FoM = P/(2 x BW x 2[superscript ENOB]) is 0.27 pJ/conv-step. The measurement results indicate that the proposed design ideas are effective and useful for wideband, low power delta-sigma analog-to-digital converters with low oversampling ratio
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