3 research outputs found

    Highly Efficient Charge Separation and Collection across in Situ Doped Axial VLS-Grown Si Nanowire p–n Junctions

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    VLS-grown semiconductor nanowires have emerged as a viable prospect for future solar-based energy applications. In this paper, we report highly efficient charge separation and collection across in situ doped Si p–n junction nanowires with a diameter <100 nm grown in a cold wall CVD reactor. Our photoexcitation measurements indicate an internal quantum efficiency of ∼50%, whereas scanning photocurrent microscopy measurements reveal effective minority carrier diffusion lengths of ∼1.0 μm for electrons and 0.66 μm for holes for as-grown Si nanowires (<i>d</i><sub>NW</sub> ≈ 65–80 nm), which are an order of magnitude larger than those previously reported for nanowires of similar diameter. Further analysis reveals that the strong suppression of surface recombination is mainly responsible for these relatively long diffusion lengths, with surface recombination velocities (S) calculated to be 2 orders of magnitude lower than found previously for as-grown nanowires, all of which used hot wall reactors. The degree of surface passivation achieved in our as-grown nanowires is comparable to or better than that achieved for nanowires in prior studies at significantly larger diameters. We suggest that the dramatically improved surface recombination velocities may result from the reduced sidewall reactions and deposition in our cold wall CVD reactor

    Adaptable Silicon–Carbon Nanocables Sandwiched between Reduced Graphene Oxide Sheets as Lithium Ion Battery Anodes

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    Silicon has been touted as one of the most promising anode materials for next generation lithium ion batteries. Yet, how to build energetic silicon-based electrode architectures by addressing the structural and interfacial stability issues facing silicon anodes still remains a big challenge. Here, we develop a novel kind of self-supporting binder-free silicon-based anodes <i>via</i> the encapsulation of silicon nanowires (SiNWs) with dual adaptable apparels (overlapped graphene (G) sheaths and reduced graphene oxide (RGO) overcoats). In the resulted architecture (namely, SiNW@G@RGO), the overlapped graphene sheets, as adaptable but sealed sheaths, prevent the direct exposure of encapsulated silicon to the electrolyte and enable the structural and interfacial stabilization of silicon nanowires. Meanwhile, the flexible and conductive RGO overcoats accommodate the volume change of embedded SiNW@G nanocables and thus maintain the structural and electrical integrity of the SiNW@G@RGO. As a result, the SiNW@G@RGO electrodes exhibit high reversible specific capacity of 1600 mAh g<sup>–1</sup> at 2.1 A g<sup>–1</sup>, 80% capacity retention after 100 cycles, and superior rate capability (500 mAh g<sup>–1</sup> at 8.4 A g<sup>–1</sup>) on the basis of the total electrode weight
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